S7-1200 Transient Analog Peak Detection on CPU 1214C HSC Inputs

1. Problem: Missed Analog Peak in S7-1200 Thickness Measurement

On a SIMATIC S7-1200 CPU 1214C (firmware V4.x), a 5 V DC linear encoder wired to an SB 1221 high-speed signal board (article number 6ES7221-3AD30-0XB0) and a 0–10 V analog probe are used to measure the wall-to-wall thickness of a moving product. As the product slides past the probe, the 0–10 V signal traces a bell-shaped curve twice — once on the entry wall and once on the exit wall. The encoder count captured at each peak lets the controller compute product thickness from the distance the product travelled between peaks.

The first attempted logic uses a strict equality comparator on the rescaled analog input:

// FBD / LAD fragment
[ IW64 (0–27648) / 27.648  -> MD100 ] --> [ MD100 == 900 ] --( M0.0 )

Even with the value handled as a real (REAL) or as a 3-digit integer (where 9 V = 900), the output M0.0 never closes. The signal sweeps through the 9 V line inside one OB1 cycle and the CPU never samples exactly 9 V. The measurement stalls at first peak.

2. Root Cause: OB1 Scan Period vs. Analog Slew Rate

The OB1 main cycle on a CPU 1214C typically runs in 1–10 ms depending on program size, executed block count, and HMI load. The analog probe's 9 V crossing may occur inside a window of 0.2–1 ms depending on the velocity of the product past the sensor. The probability of the analog input being read at exactly 9.000 V on any given OB1 cycle is essentially zero.

Three compounding facts make == unusable for analog peak detection in any PLC, not only Siemens:

• The ADC quantizes the input to integer steps (10 V / 27648 ≈ 0.36 mV per LSB). An analog value of exactly 9.000 V requires the converter output to land on integer 24883.
• Noise on the analog front end (typically ±2–5 LSB) prevents a stable equality match.
• The OB1 read instant and the 9 V crossing instant are statistically independent events.

The fix is to switch from exact-match logic to one of three robust detection methods: window comparator, edge-triggered set coil, or hardware interrupt OB. All three are covered below.

3. Hardware Stack and Wiring

3.1 CPU 1214C I/O inventory

The CPU 1214C DC/DC/DC variant exposes:

• 14 onboard 24 V DC digital inputs, of which 6 can be configured as high-speed counters (HSC) up to 100 kHz single-phase or 80 kHz quadrature (firmware V4.0+).
• 2 onboard analog inputs, 0–10 V or 0–20 mA, 12-bit resolution. The analog input ground is referenced internally.
• 1 signal board slot for plug-in I/O expansion (the SB is wired on the front underside of the CPU).

Reference: SIMATIC S7-1200 Programmable Controller System Manual and the S7-1200 product page.

3.2 SB 1221 — 6ES7221-3AD30-0XB0

The 5 V DC version is the correct board for a 5 V TTL encoder. The encoder's A channel (and B if used) goes to Ia.0 and Ia.1; the index channel, if used for synchronization, goes to Ia.2. The remaining input is left free or used as the OB40 digital interrupt source. Reference: Siemens Industry Online Support.

4. Analog Signal Scaling

The CPU 1214C analog input is configured for 0–10 V mode (default). The raw integer output range is 0 to 27648, with 0 V → 0 and 10 V → 27648. The 3-digit integer scaling used by the original program divides the raw value by 27.648 and rounds to integer, yielding 0–1000 for the 0–10 V range. The 9 V threshold becomes integer 900.

The robust alternative is to scale to engineering units directly with the TIA Portal NORM_X / SCALE_X instructions so threshold comparisons use floating-point volts, eliminating rounding error:

// SCL fragment — convert raw analog to engineering volts
"AI_Raw"   := IW64;            // 0–27648
"AI_Volts" := NORM_X(MIN := 0.0, VALUE := IW64, MAX := 27648.0) * 10.0;

For window-comparison thresholds, common values around 9 V translate as follows:

5. Solution 1 — Window Comparison with Set Coil

The simplest fix is to replace the equality test with a window (range) test. Instead of AI == 9 V, accept any value in a band around 9 V, for example 8.8–9.2 V. Combined with a positive-edge-detected Set coil, the output latches the first valid detection:

// LAD / FBD
[ "AI_Volts" >= 8.8 ]  ─┐
                         ├──[ AND ]──[ P ]──( S  "Peak1Detected" )──
//
// Single comparator block (TIA Portal V16+)
[ "AI_Volts" IN 8.8 .. 9.2 ]  --( P )-- ( S  "Peak1Detected" )

Reset the latch after the second peak has been processed and the thickness has been written. The window width must cover ADC noise, encoder-induced vibration on the probe, and at least one full OB1 cycle's worth of signal slew. A 0.4 V window around 9 V (8.8–9.2) is conservative and reliable for industrial probes.

6. Solution 2 — Threshold-Edge Set with Hysteresis

A cleaner state-machine approach uses one rising-edge threshold for "entering" the peak zone and one falling-edge threshold for "leaving" it. The gap between the two thresholds is hysteresis, which prevents the comparator from chattering if the signal oscillates at the peak:

// SCL — hysteresis state machine
IF #state = 0 THEN                // IDLE
    IF "AI_Volts" >= 9.0 THEN
        #state := 10;
        "Peak1Detected" := TRUE;
        "Peak1_HSC"     := "HSC1".CountValue;
    END_IF;

ELSIF #state = 10 THEN            // WAIT FOR FALL
    IF "AI_Volts" < 8.5 THEN
        #state := 20;
    END_IF;

ELSIF #state = 20 THEN            // WAIT FOR 2nd PEAK
    IF "AI_Volts" >= 9.0 THEN
        "Peak2_HSC" := "HSC1".CountValue;
        "ThicknessPulses" := "Peak2_HSC" - "Peak1_HSC";
        "Thickness_mm"    := INT_TO_REAL("ThicknessPulses") / "PulsesPerMm";
        #state := 0;
        "Peak1Detected" := FALSE;
    END_IF;
END_IF;

The rising-edge threshold (9.0 V) is sampled every OB1 cycle, so even a 0.5 ms peak crossing is normally captured because OB1 typically runs at 1–5 ms. The falling-edge threshold (8.5 V) gives a 0.5 V hysteresis band.

7. Solution 3 — Cyclic Interrupt OB35 for Deterministic Sampling

If the analog signal can sweep through 9 V in less than one OB1 cycle, move the threshold check out of the main program into a cyclic interrupt OB. OB35 runs at a fixed period independent of OB1 and can be configured down to 1 ms on a CPU 1214C (range: 1–60 000 ms, configured under CPU Properties → Cyclic Interrupts).

7.1 TIA Portal configuration

1. Open the device configuration of the CPU 1214C.
2. Select Cyclic Interrupts → OB35.
3. Set the cycle time to 1 ms.
4. Set OB35 priority higher than OB1 (default OB35 priority is 12; range 2–26).
5. Add a new OB35 block to the project and paste the threshold-detection logic.

At 1 ms sampling rate, a 0.5 ms peak crossing has roughly a 50 % chance of being captured by OB35. If the signal is even faster, drop OB35 to 0.5 ms (firmware V4.2+) or switch to the hardware interrupt method in §8.

7.2 Sample OB35 logic

// OB35 — cyclic interrupt @ 1 ms
IF "AI_Volts" >= 9.0 AND NOT "Peak1Detected" THEN
    "Peak1_HSC"     := "HSC1".CountValue;
    "Peak1Detected" := TRUE;
END_IF;

IF "Peak1Detected" AND "AI_Volts" < 8.5 THEN
    "WaitingForPeak2" := TRUE;
    "Peak1Detected"   := FALSE;
END_IF;

IF "WaitingForPeak2" AND "AI_Volts" >= 9.0 THEN
    "Peak2_HSC"       := "HSC1".CountValue;
    "ThicknessPulses" := "Peak2_HSC" - "Peak1_HSC";
    "Thickness_mm"    := INT_TO_REAL("ThicknessPulses") / "PulsesPerMm";
    "WaitingForPeak2" := FALSE;
END_IF;

8. Solution 4 — Hardware Interrupt OB40 on a Digital Input

If the analog probe has a comparator output (most industrial 0–10 V probes for thickness measurement expose a 24 V DC switching output in addition to the analog signal), route the comparator output into one of the SB 1221 inputs (e.g., Ia.3). Configure that input as a rising-edge interrupt source:

1. Device configuration → SB 1221 → input channel Ia.3.
2. Check Enable rising-edge interrupt.
3. Assign Hardware interrupt OB to OB40.
4. Set OB40 priority higher than OB1 (default 16; range 2–26).

Inside OB40, capture the HSC count and write the peak index. The OB40 fires within microseconds of the analog comparator's edge, regardless of OB1 load:

// OB40 — hardware interrupt on comparator rising edge
IF "FirstEdge" = FALSE THEN
    "Peak1_HSC" := "HSC1".CountValue;
    "FirstEdge" := TRUE;
ELSE
    "Peak2_HSC"       := "HSC1".CountValue;
    "ThicknessPulses" := "Peak2_HSC" - "Peak1_HSC";
    "Thickness_mm"    := INT_TO_REAL("ThicknessPulses") / "PulsesPerMm";
    "FirstEdge"       := FALSE;
END_IF;

The OB40 handler must be short (no heavy math). Offload the thickness scaling and HMI display to OB1 by toggling a flag.

9. Analog Input Threshold Interrupt (Firmware V4.x)

Starting with S7-1200 firmware V4.0, the analog input channels can be configured to trigger a hardware interrupt when an upper or lower limit is exceeded. The advantage is that the CPU detects the limit internally without polling the AI value at all.

1. Device configuration → CPU 1214C → Analog inputs → AI0 (channel 0).
2. Check Enable upper limit interrupt.
3. Set the upper limit to 9.0 V (in engineering units).
4. Assign OB40 as the interrupt target.

This approach removes the need for cyclic OB35 polling or external comparators. The interrupt fires only on the threshold crossing, not on every cycle.

10. Encoder-Based Thickness Calculation

10.1 HSC configuration in TIA Portal

1. Add a new technology object: Counters and timers → High_Speed_Counter.
2. Assign it to the SB 1221 input Ia.0 (single phase) or Ia.0/Ia.1 (A/B quadrature).
3. Set counting mode to Count indefinitely so the count wraps cleanly across product passes.
4. Set initial count value to 0 and upper/lower limits to the DINT range.
5. Call CTRL_HSC once in OB100 / OB1 to start the counter.

10.2 Pulses per millimetre

The encoder's resolution defines PulsesPerMm. For a 5 µm linear encoder, PulsesPerMm = 200. For a 1 µm glass scale, PulsesPerMm = 1000. Verify the resolution from the encoder's nameplate or data sheet — using the wrong value silently doubles or halves every thickness measurement.

10.3 Thickness formula

Thickness_mm = (Peak2_HSC − Peak1_HSC) / PulsesPerMm

For an A/B quadrature encoder the count increments by 1 per edge or by 4 per cycle depending on the firmware setting. The PulsesPerMm constant must be scaled accordingly:

10.4 Handling direction reversals

If the product can move back and forth between peaks, the HSC count may decrease between peak 1 and peak 2. Use absolute value before subtracting, or maintain a peak-ordered state machine that records the direction at each peak.

11. Verification and Commissioning Checklist

12. Edge Cases and Field-Proven Tips

12.1 Analog noise and ground loops

A 0–10 V probe driven long distances in a plant with VFDs picks up common-mode noise. Add a 100 nF capacitor across the AI+ and AI− terminals at the CPU terminal block, and use shielded twisted-pair cable with the shield grounded at one end only (CPU end). Reference the S7-1200 wiring guidelines for shielded cable preparation.

12.2 Temperature drift on the analog probe

Thickness probes using LVDT or eddy-current sensing drift with temperature. Calibrate the 9 V threshold at the operating temperature during commissioning, not at room temperature before install.

12.3 Multiple products in the field of view

If two products can be in front of the probe simultaneously, the analog trace will show four peaks (two per product). Use a digital presence sensor upstream of the probe to gate the state machine so it only looks for exactly two peaks per "product present" window.

12.4 Out-of-range analog values

Configure the analog input's diagnostics (under AI0 → Diagnostics) to trigger on wire break (0 V < threshold) and overflow (≥ 10.5 V). Both will halt the line and alarm the operator, preventing false thickness readings from a damaged probe.

12.5 24 V DC vs. 5 V DC signal board selection

There is also an SB 1221 24 V DC variant (article number 6ES7221-3BD30-0XB0, 4 inputs at 24 V DC, 200 kHz). The 5 V version (6ES7221-3AD30-0XB0) is mandatory for 5 V TTL encoders. Mixing them up is a common source of "no count" symptoms.

12.6 Watchdog on peak detection

If peak 2 never arrives (product stalls, probe fouled), the state machine sits in WAIT FOR 2nd PEAK forever. Add a watchdog timer: if peak 2 has not arrived within X mm of expected travel, abort and alarm.

// Watchdog — abort if peak 2 not seen within 500 mm
IF "WaitingForPeak2" AND ("HSC1".CountValue - "Peak1_HSC") > "MaxPulses" THEN
    "Thickness_mm" := -1.0;          // error sentinel
    "WaitingForPeak2" := FALSE;
    "Alarm_ThicknessTimeout" := TRUE;
END_IF;

12.7 HSC count overflow on long runs

If the encoder can run continuously across many products, the 32-bit HSC counter (range −2 147 483 648 to 2 147 483 647) may overflow after several kilometres of travel. Capture and reset the HSC at a known reference mark (e.g., a photo-eye at the start of the line) to keep peak-to-peak differences small and unambiguous.

13. Summary

Equality comparison on an analog signal in an S7-1200 program is virtually guaranteed to miss a transient peak that crosses the target value faster than the OB1 scan period. The fix is to switch to a window or threshold-edge comparator, or to push the detection into a faster execution context: OB35 (1 ms cyclic interrupt), OB40 (hardware interrupt), or the analog input's threshold interrupt (firmware V4.0+). All four solutions latch the HSC encoder count at each peak; subtracting the two counts and dividing by the encoder's pulses-per-millimetre yields the wall-to-wall thickness in millimetres. Verify the result against a calibrated thickness block during commissioning and recheck after any encoder, probe, or signal-board replacement.

14. FAQ