1. Problem Overview: Upgrading a SIMATIC S7-300 CPU 315-2DP to 315-2PN/DP
Replacing a SIMATIC S7-300 CPU 6ES7315-2AG10-0AB0 with a 6ES7315-2EH14-0AB0 on a running machine is not a one-to-one, plug-and-play hardware swap. The two CPUs differ in firmware generation, work memory, on-board interface set (MPI/DP only versus PROFINET + DP), instruction-execution speed, and the default STEP 7 / TIA Portal project structure that surrounds them.
Field reports consistently show that loading a backup from the old CPU onto the new CPU and pressing "RUN" results in a CPU that is in RUN without diagnostic buffer entries and without compiler errors, yet the machine sequence either runs too fast, misses steps, or executes a different branch of the same logic. Operator-side parameter changes (delays, RPM setpoints) made through the HMI temporarily mask the problem, but the change does not survive a cold restart and does not transfer to a sister machine with identical hardware.
2. CPU Variant Comparison
Although both catalog numbers begin with 6ES7315-2, the two devices are not interchangeable at the project level.
| Attribute | 6ES7315-2AG10-0AB0 | 6ES7315-2EH14-0AB0 |
|---|---|---|
| Marketing designation | CPU 315-2DP | CPU 315-2PN/DP |
| Firmware generation | V2.x era | V4.x era |
| On-board interface 1 (IF1) | MPI / PROFIBUS-DP master/slave | MPI / PROFIBUS-DP master/slave |
| On-board interface 2 (IF2) | PROFIBUS-DP master/slave | PROFINET (2-port switch) + PROFIBUS-DP |
| Typical OB1 cycle time on a real sequence | ~20 ms (field-measured) | ~2 ms (field-measured) |
| STEP 7 project environment | STEP 7 V5.x (classic) | STEP 7 V5.5 SPx or TIA Portal |
| PROFINET device replacement without PG | Not applicable (no PROFINET) | Supported via primary setup tool / TIA |
The 10x cycle-time reduction reported in the field is the single most common cause of "the sequence runs but it is wrong" symptoms. Anything in the original program that depends on OB1 wall-clock time — software timing relays, TON/TOF accumulators, manual cycle counters, indexing operations — will execute ten times faster on the new CPU unless the program itself is reorganized or the timer base is changed.
3. Root Cause Analysis: Why the Backup "Loads" but the Sequence Stops Working
Loading a serial backup (.s7p or .zip) from a 315-2DP into a 315-2PN/DP deposits the blocks but does not rebuild the hardware configuration, the PROFIBUS/PROFINET topology, or the CPU properties dialog. The four mechanisms that produce silent sequence drift on a backup-restored 315-2EH14 are:
- Hardware configuration missing or wrong: Without a matching HW Config in the loaded project, the new CPU defaults to its module rack, but rack 0 may not match the physical rack. Distributed I/O (ET200S, ET200M) may not be assigned to the DP or PN master system, producing implicit I/O-not-updated behavior with no SF LED if the slots are simply inactive.
- Cycle-time compression: A 10x faster OB1 means every software timing element in the program expires 10x faster. Mechanical sequencing that relied on ~150 ms to settle now runs at ~15 ms — the cylinder has not finished extending before the next rung is evaluated.
-
Clock memory bits not enabled: The default in a freshly created CPU 315-2PN/DP project has clock memory disabled. Any logic that referenced clock bits (e.g.,
M10.0= 10 Hz,M10.1= 5 Hz) becomes a static 0, breaking periodic latches and blinkers. - OB10 / OB35 / OB40 parameters not carried over: Time-of-day interrupt OB10, cyclic interrupt OB35 (default 100 ms), and hardware interrupt OB40 must be present in the new project with the same phase offset and period. If the new project does not contain these OBs, the cyclic interrupt logic simply never runs.
The 315-2PN/DP does not produce a diagnostic-buffer entry for any of these conditions because they are not faults — they are design-time configuration drift. The CPU happily runs whatever the project tells it to run.
4. Cycle-Time Compression (20 ms → 2 ms) and What It Breaks
The original CPU 315-2AG10 was measured at approximately 20 ms OB1 cycle time on the loaded machine. The 315-2EH14 measured approximately 2 ms on the same machine code. Three classes of code are immediately affected:
| Construct | Effect at 20 ms OB1 | Effect at 2 ms OB1 |
|---|---|---|
| Self-resetting TON as a debounce (e.g., 50 ms) | Reliable | Ton never expires; rung latches permanently |
| Word-increment per cycle for indexing | Smooth ramp | Ramp 10x faster, overshoots target |
| Edge-triggered step chains with mechanical dwell | Stable | Skips steps because next bit sets before previous actuator reports done |
| Clock memory bit M10.0 referenced as 10 Hz blink | Visible blink | If clock memory not enabled, constant 0 → interlock drops |
TON, TOF, TP, S_PULSE, S_PEXT, and S_ODT instance in the project and re-evaluate their time bases. Where possible, move millisecond-scale timing into OB35 (cyclic interrupt) with a stable phase, and gate mechanical sequencing with hardware-proven feedback rather than software timers alone.5. STEP 7 V5 / TIA Portal Migration Procedure
The accepted sequence when stepping across the 2AG10 → 2EH14 boundary inside the SIMATIC S7-300 family is to rebuild the project rather than transplant the backup. The procedure below is the one that produces a stable, reproducible migration across all five sister machines in the field scenario described.
5.1 Prerequisites
- STEP 7 V5.5 + SPx (or current TIA Portal) installed, including the HSP (Hardware Support Package) covering the 315-2EH14 with the matching firmware version installed on the device.
- Online backup (
.s7p/.zip) of the source CPU 315-2AG10 read with PG online functions or uploaded via the memory card. - Full topology diagram: rack layout, slot assignment, PROFIBUS-DP node addresses, ET200 station numbers, HMI connection parameters.
- If the new CPU will use PROFINET: GSD file for every PROFINET device on the network, plus the IO controller / IO device naming plan.
5.2 Step-by-Step Project Rebuild
-
Create a new STEP 7 project. Insert a SIMATIC 300 station, then drag the CPU 315-2PN/DP from the hardware catalog (order number
6ES7 315-2EH14-0AB0) onto slot 2. This creates a fresh HW Config that matches the new CPU's firmware capabilities. -
Replicate the rack layout. Insert power supply, IM (if any), and signal modules in the same slots as the physical machine. Verify the I/O address ranges match the program. Where the original project assigned
IW0to slot 4, the new project must do the same. -
Open CPU properties and re-apply every checkbox from the old CPU. Specifically check (and re-enter) the following items, which are the ones that bit-roast across a CPU swap:
- Cyclic interrupts — OB35 period (default 100 ms; was it 50 ms or 200 ms on the old machine?) and phase offset.
- Time-of-day interrupts — OB10 start date/time, execution (once / every minute / hourly / daily / weekly / monthly / annually), and any subsequent OB10..OB17 if multiple schedules were used.
- Hardware interrupts — OB40..OB47 assignments, if I/O modules were set to trigger hardware interrupts.
-
Clock memory — enable and select a byte address (commonly
MB0orMB10). Without this, every clock-bit reference collapses to 0. - Startup characteristics — OB100 / OB101 / OB102 presence and warm/cold restart behavior. Confirm whether the original project used a restart OB at all.
- Diagnostics / process interrupts — match the OB82 / OB83 / OB85 / OB86 / OB122 enable bits. The new CPU defaults may differ.
- Protection — password level, write/read protection. If the new project does not match the source, the HMI may lose write access.
- Re-assign DP and PN networks in NetPro. The 315-2EH14 has a DP master on IF1 (MPI/DP) and a PROFINET interface on IF2. Recreate the subnet, assign the CPU as the IO controller on the PROFINET subnet, drag in every distributed station, and assign device names. The PROFINET device name must match the topology exactly — a missing or renamed device shows up as an "IO device failure" only after the first restart.
-
Import the program blocks. From the old CPU backup, copy
OB1, all FBs, FCs, DBs, SFBs, SFCs, UDTs, and the symbol table into the new project. Do not rely on a serial restore; do a structured import via PLC → Upload Station to PG if the new CPU is online, or via the blocks container in SIMATIC Manager. - Run Check Block Consistency (Tools → Check Block Consistency → Compile All). Resolve every reported access error. Access errors on the 315-2EH14 that did not occur on the 315-2AG10 typically mean the block was compiled against a system data snapshot that has now been rebuilt.
- Download the hardware configuration to the new CPU first, wait for the CPU to return RUN, and only then download the blocks. Downloading blocks before HW Config can leave the CPU in STOP with SF if the block references an I/O address that does not yet exist in the new hardware.
- Watch the diagnostic buffer online immediately after the first download: PLC → Diagnostic/Setting → Diagnostic Buffer. Any OB-not-loaded, I/O access error, or rack/OB configuration mismatch appears here.
6. NetPro and PROFINET Configuration for the 315-2EH14
The most visible project-level difference between the two CPUs is the addition of a PROFINET interface. Even if the migration is intentionally DP-only, the PROFINET interface is still active and must be addressed in NetPro.
6.1 Decision matrix
| Source field network | Target field network on 315-2EH14 | Required action |
|---|---|---|
| PROFIBUS-DP only | PROFIBUS-DP only (IF1) | Recreate DP subnet in NetPro, keep node addresses identical. PROFINET port can be left unassigned or set to monitor mode. |
| PROFIBUS-DP only | PROFINET + PROFIBUS | Optional transition. If HMI was on PROFIBUS, it can stay; if HMI is moved to PROFINET, the HMI project must update its connection. |
| MPI only | PROFINET | Re-engineer — not in scope of this article; treat as a project rebuild. |
6.2 PROFINET device naming
Every IO device on the PROFINET subnet must receive its device name from the IO controller. The naming step is the one that most often trips an otherwise clean migration:
- Open PLC → Ethernet → Edit Ethernet Node in SIMATIC Manager (or Online → Accessible Devices in TIA Portal).
- Browse the PROFINET subnet, identify each IO device by MAC address or port, and assign the same device name as the original topology.
- Verify each device's IP address matches the topology. PROFINET device-name mismatches surface as SF on the device and BF on the CPU.
- If the project uses PROFINET device replacement without exchangeable medium, confirm the same role is assigned in the IO controller properties.
7. OB10, OB35, and Clock Memory Parameter Carry-Over
These three CPU properties are the highest-impact silent defaults that disappear across the migration. A focused checklist keeps the rebuild predictable.
| Property | Default in fresh 315-2EH14 project | Source 315-2AG10 project likely had | Symptom if not restored |
|---|---|---|---|
| Clock memory byte | Disabled | Enabled, e.g., MB10 | Blink / periodic latch logic freezes |
| OB35 cyclic interrupt period | 100 ms | Often 50 ms or 200 ms | Process-control loops run at wrong sample rate |
| OB35 phase offset | 0 ms | Often 10–50 ms to avoid bus contention | Determinism drift; diagnostic nuisance |
| OB10 time-of-day interrupt | Not loaded | Often loaded for shift reports, lubrication, etc. | Scheduled actions never fire |
| OB40..OB47 hardware interrupt | Not loaded | Loaded only if DI modules were configured to interrupt | Fast I/O events are missed or errored |
| OB100 startup OB | Not loaded | Usually loaded | Initialization values may not be reapplied on warm restart |
| Diagnostics OB82/85/86/122 | Not loaded | Often loaded | Pull/plug events generate STOP instead of OB runs |
8. HMI Integration and Operator-Visible Parameter Drift
The original symptom — "changing delay and RPM on the HMI makes the new CPU behave" — is a strong signal that the HMI tags point at the correct process image but the program logic was tuned against the 20 ms OB1 cycle. After the migration, the operator panel can compensate within a narrow band, but the underlying timing structure is still 10x faster than the original.
8.1 HMI project check
- Confirm the HMI project connection points to the new CPU's IP address (PROFINET) or PROFIBUS node address (DP).
- Re-confirm the symbol / tag connection — if the HMI uses absolute addresses and the rebuild shifted the symbol base, operator-entered values can land in a different DB or in a different byte of the same DB.
- Where the original project wrote to retentive data blocks, confirm the
RETAINattribute is still set on the new CPU's DB properties. Otherwise, every cold restart wipes operator-tuned values back to defaults.
9. Replicating the Fix Across Sister Machines (Palletiser Case)
field reports includes five near-identical machines, with the second (a palletiser) failing to come up cleanly even after the first machine was made to run. Two causes explain this:
- The first machine was patched in place rather than rebuilt. Operator HMI tuning compensated for the timing drift and was never documented. When the second machine was commissioned, the rebuilt project ran the timing-correct code but the palletiser sequence relied on values the first machine's HMI had overwritten.
- The palletiser's I/O assignment differs from the first machine. Even if mechanical layout is identical, the slot-to-address mapping may differ (a DI module on slot 5 versus slot 6, or a different PROFIBUS node address on an ET200S). The HW Config rebuild must be done per machine from the actual as-built drawing, not copied from the first machine's project.
Field-proven recipe for fleet rollout:
- Build the master project from one validated source backup, with HW Config rebuilt from the as-built drawing of the first machine.
- Confirm the first machine runs end-of-cycle without HMI tuning.
- Save the master project as read-only baseline. Every subsequent machine gets a copy of this baseline plus a per-machine slot/topology file.
- For each sister machine, rebuild only the HW Config and NetPro against its own as-built drawing. Do not copy the first machine's block container without re-checking block consistency.
10. Verification Procedure
After the rebuild and download, run the following checks. Every item must pass before the machine is returned to production.
- Diagnostic buffer: PLC → Diagnostic Buffer. There should be no entries for OB-not-loaded, rack failure, or I/O access error after a STOP/RUN cycle.
- Module status: PLC → Module Information for every slot. I/O must show OK, not "not available" or "fault".
- Cycle time: online → PLC → Operating Mode → Scan Cycle Time. Record the new OB1 minimum, maximum, and current cycle. Confirm the maximum is bounded by the deterministic design (typically < 50 ms for mechanical sequencing).
- Cyclic interrupt: confirm OB35 is loaded and runs. Place a counter in OB35 and watch it increment online.
- Clock memory: confirm the configured clock byte increments. Force-watch a single bit with the online monitor and confirm it toggles at the configured frequency.
- PROFINET / PROFIBUS status: no SF on the CPU, no BF on either port, all configured IO devices show "OK" in the topology view.
- End-to-end sequence test: run a full mechanical cycle and time each step against the as-built timing sheet. Do not accept HMI-tuned values as proof.
- Cold restart: power cycle the CPU, confirm OB100 (if loaded) runs, confirm retentive DBs preserve values, and confirm the sequence comes up in the same state it was in before the power cycle.
11. Forward Path: S7-300 to S7-1500 Migration Note
The same migration methodology — do not transplant, rebuild against the new firmware — applies when the next step is from the 315-2EH14 to an S7-1500 CPU (for example 6ES7515-2AM02-0AB0 or current equivalent). Siemens publishes a generation-change guide that consolidates the differences in OB organization, symbol/PLC data-type handling, and PROFINET device-name conventions between the two families.
- Reference: Siemens Migration Guide: SIMATIC S7-300/S7-400 to SIMATIC S7-1500
- Reference: TIA Portal Migration Options — Overview
For the S7-1500 target, the OB model is reorganized (OB1 is replaced by a cyclic program in a different OB block, time-of-day and cyclic interrupts change names and default periods), and bit memory timing semantics move toward IEC timers. Plan for at least one re-validation cycle on a representative machine before rolling the migration out across a fleet.
12. Diagnostic and Troubleshooting Matrix
| Observed symptom | Likely cause in this migration | Diagnostic step | Fix |
|---|---|---|---|
| Sequence runs too fast | OB1 cycle dropped ~10x | Compare online scan cycle time | Move short delays to OB35 with explicit period; use hardware-proven feedback |
| Periodic latches freeze | Clock memory byte not enabled in new CPU properties | Monitor configured clock byte | Enable clock memory in CPU properties, set same byte address as original |
| Cyclic process loop misbehaves | OB35 period changed | Confirm OB35 period and phase offset | Re-enter OB35 parameters matching original project |
| BF LED steady on PROFINET port | PROFINET device name mismatch | Browse IO devices with PG | Assign device names per topology |
| HMI loses write access after restart | CPU protection level mismatched | Read CPU properties | Re-enter write-protection password / level |
| Operator-tuned values lost after power cycle | DB RETAIN attribute not preserved | Inspect DB properties | Re-mark DBs as RETAIN; re-download |
| CPU STOPs on first I/O access | Hardware configuration not downloaded before blocks | Check download order | Re-download HW Config, then blocks |
| Sister machine behaves differently with same project | I/O slot mapping copied from first machine | Compare as-built drawings | Rebuild HW Config per machine against as-built |
Why does a 315-2AG10 backup not run correctly on a 315-2EH14 even though the block consistency check passes?
A serial backup contains blocks but not a valid HW Config or NetPro for the new CPU. The 315-2EH14 has a different on-board interface set (PROFINET added) and a much faster OB1 cycle (typically ~2 ms vs ~20 ms on the 315-2AG10). Block consistency only checks internal references, not timing semantics, so the program "compiles" but the mechanical sequence runs in the wrong time domain. Rebuild the project against the new CPU and re-enter OB35 / OB10 / clock-memory parameters from the original CPU properties.
How do I recover the original timing on the new 315-2EH14?
Do not try to artificially slow the new CPU. Audit every TON, TOF, TP, S_PULSE, S_PEXT, and S_ODT instance in the project and re-evaluate each time value. Where millisecond-scale timing is used to debounce a sensor or pace a step chain, move the timing into OB35 with an explicit period (e.g., 50 ms or 100 ms) and use the cyclic interrupt as the time base. Always gate mechanical sequencing with the hardware-proven feedback bit, not with a software timer alone.
What is the first thing to check if the new CPU is in RUN with no diagnostic buffer entry but the sequence is wrong?
Check clock memory and OB35 parameters first. Open the CPU properties on the new project, confirm clock memory is enabled with the same byte address as the source project, and confirm OB35 is loaded with the same period and phase offset. These two silent-default losses are responsible for the majority of "RUN with no error, wrong sequence" symptoms reported across this migration.
Should I migrate directly from STEP 7 V5 to TIA Portal when changing the CPU?
Not necessarily. The 315-2EH14 is fully supported in STEP 7 V5.5 SPx, and the source 315-2AG10 project is also a V5 project. A V5-to-V5 migration inside the SIMATIC S7-300 family is the lowest-risk path. A TIA Portal migration makes sense when the target is an S7-1500, in which case use the Siemens migration guide and TIA Portal migration tool to convert the project; do not attempt a direct copy.
Why does my palletiser (second machine) misbehave even after the first machine runs correctly on the new CPU?
Each sister machine needs its own HW Config and NetPro built from its as-built drawing. I/O slot assignments, PROFIBUS node addresses, and PROFINET device names typically differ between machines even when the mechanical layout looks identical. Use the first machine's project only as a master template for the program; rebuild the topology file per machine. Also confirm operator-tuned HMI values are not being relied on as part of the validated sequence — those workarounds on the first machine will not transfer to the palletiser.