S7-300 Migration: CPU 314 IFM to CPU 312C Compatibility Guide

David Krause22 min read
S7-300SiemensTechnical Reference
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S7-300 Migration: CPU 314 IFM to CPU 312C Compatibility Guide

Replacing a discontinued SIMATIC S7-300 CPU 314 IFM (MLFB 6ES7 314-5AE01-0AB0) with the current compact CPU 312C (MLFB 6ES7312-5BF04-0AB0) is a routine lifecycle migration in plants that have standardized on the S7-300 family. Both CPUs sit in the same STEP 7 V5.x programming environment, use the same MPI/DP backplane, and share the same instruction set baseline, so the migration looks straightforward on paper. In practice, three engineering constraints drive the bulk of the work: the 312C exposes far fewer onboard digital and analog channels, the work-memory and Micro Memory Card (MMC) requirements are different, and the default address map shifts because the integrated I/O starts at a different image offset. This reference walks through the technical deltas, the STEP 7 project changes, the offline validation path with S7-PLCSIM, and the on-site commissioning sequence required for a clean, downtime-controlled swap.

For the broader Siemens migration framework - including the move to SIMATIC S7-1500 if you eventually go that direction - see the official Guide for Migrating SIMATIC S7-300/S7-400 to SIMATIC S7-1500. The rewire, hardware reconfiguration, and program-conversion steps in that document apply to intra-S7-300 replacements like the one covered here.

1. Migration Scenario and Affected Hardware

The CPU 314 IFM is an older compact CPU that integrates the program execution, an integrated function module (IFM) for special functions, and a fixed population of onboard I/O directly on the central module. It was designed for small, stand-alone machines that needed analog channels and digital channels without extra signal modules (SMs). Because the IFM variant was phased out, spare-part users are pushed toward the 312C, which is the current compact-class S7-300 CPU with the closest form factor and the same STEP 7 V5.x toolchain.

Important: The 312C is not a pin-compatible, drop-in replacement. The front connector footprint, the default address map, and the integrated I/O count are all different. Treat the swap as a re-engineering task, not a module exchange.

Key MLFBs covered by this guide:

  • Source CPU: SIMATIC S7-300 CPU 314 IFM, 6ES7 314-5AE01-0AB0 (discontinued, firmware family compatible with STEP 7 V5.x)
  • Target CPU: SIMATIC S7-300 CPU 312C compact, 6ES7312-5BF04-0AB0, firmware V3.x, STEP 7 V5.5 + SP2 or later

2. Hardware Comparison: CPU 314 IFM vs CPU 312C

The table below summarizes the head-to-head specs that drive the migration. Values are taken from the S7-300 CPU 31xC and CPU 31x operating instructions and the S7-300 module data manual.

Parameter CPU 314 IFM (6ES7 314-5AE01-0AB0) CPU 312C (6ES7312-5BF04-0AB0)
Work memory (integrated) 24 KB code + data 64 KB code + data
Load memory Internal Flash (no MMC slot) MMC required, up to 8 MB
Retentive bit memory Configurable, up to 16 KB retentive on bit memory
Onboard digital inputs (DI) 16 10
Onboard digital outputs (DO) 16 6
Onboard analog inputs (AI) 4 0
Onboard analog outputs (AO) 1 0
Fast counters / frequency inputs Integrated via IFM (channel-dependent) 2 counters, 10 kHz each, 24 V DC, with direction and gate
Front connector(s) 2 x 40-pin 1 x 40-pin
Integrated 24 V DC sensor supply Yes Yes
Programming interface MPI MPI (and DP master on -5BF04 variant via 2nd interface)
Bit instructions execution time 0.3 microseconds 0.2 microseconds
Max signal modules / function modules 8 SM/FM 8 SM/FM
STEP 7 version STEP 7 V5.x STEP 7 V5.5 + SP2 or later

Two design changes stand out: the 312C has roughly 50 percent fewer onboard DI/DO channels and no onboard analog at all. Every analog channel the application currently uses on the IFM must be replicated by an external SM 334 or SM 335 module in the new rack.

3. Onboard I/O Reduction and Required Expansion Modules

Count the channels before quoting the swap. The 314 IFM provides 16 DI / 16 DO / 4 AI / 1 AO directly on the CPU. The 312C provides 10 DI / 6 DO and no analog channels. The shortfall must be made up by adding SM 321 (DI), SM 322 (DO), and SM 334 (AI/AO) modules on the rail.

3.1 Digital Channel Budget

Direction CPU 314 IFM CPU 312C Delta Typical SM to add
DI 24 V DC 16 10 -6 6ES7321-1BH02-0AA0 (16 DI) or 6ES7321-1BL00-0AA0 (32 DI)
DO 24 V DC, 0.5 A 16 6 -10 6ES7322-1BH01-0AA0 (16 DO) or 6ES7322-1BL00-0AA0 (32 DO)

3.2 Analog Channel Budget

Direction CPU 314 IFM CPU 312C Delta Typical SM to add
AI voltage/current 4 0 -4 6ES7334-0CE01-0AA0 (4 AI) or 6ES7331-7KF02-0AB0 (8 AI)
AO voltage/current 1 0 -1 6ES7332-5HD01-0AB0 (4 AO) or 6ES7334-0CE01-0AA0 with 2 AO

If the application uses the 4 AI / 1 AO for transducer scaling, PID control, or valve actuation, a typical mitigation is to drop in a single SM 334 AI4/AO2 (6ES7334-0CE01-0AA0) plus an SM 321 (6ES7321-1BH02-0AA0) for the missing digital inputs. Confirm spare slots on the rail - the 312C supports the same eight SM/FM maximum, but the 314 IFM was often deployed with very few external modules because of the integrated I/O.

3.3 Wiring Migration

Because the 312C has a single 40-pin front connector, the wiring diagram cannot be reused as-is. The two 40-pin connectors on the 314 IFM split digital I/O across two terminal blocks; the 312C compresses the digital I/O into one 40-pin connector and reserves the rest of the footprint for the two counter/frequency channels (X11). Re-strip the field wiring and remap terminal-by-terminal rather than trying to use a 1-to-1 pin cross-reference table.

4. Work Memory, Micro Memory Card, and Retentive Behavior

The CPU 312C needs a Micro Memory Card to operate. Without an MMC inserted, the CPU will not start and the SF LED will be lit steady. This is the single most common reason a freshly migrated 312C refuses to go into RUN at first power-up.

4.1 Required MMC Size

Program size Recommended MMC Siemens MLFB
Up to 64 KB code/data 128 KB 6ES7953-8LG20-0AA0
Up to 256 KB code/data 512 KB 6ES7953-8LJ20-0AA0
Up to 1 MB 2 MB 6ES7953-8LL20-0AA0
Up to 4 MB 4 MB 6ES7953-8LM20-0AA0
Up to 8 MB 8 MB 6ES7953-8LP20-0AA0

4.2 Retentive Mapping

The 314 IFM stored retentive data in internal Flash. The 312C stores retentive data on the MMC, which means the MMC must be ordered with the right number of write cycles for the application. Industrial MMC variants (6ES7953-8Lxxx-0AA0) are rated for 100,000 write/erase cycles minimum.

Update the STEP 7 hardware configuration (HW Config) > CPU Properties > Retentive Memory to reflect the new bit-memory and timer/counter ranges. A safe default is to mark MB0 - MB15, T0 - T15, and C0 - C7 as retentive, but always derive this from the customer specification rather than copying values blindly from the 314 IFM project.

Watch: The 312C supports a larger retentive range than the 314 IFM, so you may also use the migration as a chance to expand retentivity. Do not do that without a process-safety review - expanding the retentive region can mask intermittent faults that previously forced a cold restart.

5. Address Mapping Changes and the STEP 7 Rewire Function

This is the most time-consuming part of the migration. The default I/O addresses assigned by STEP 7 to the integrated channels differ between the two CPUs, and adding SMs shifts all subsequent module addresses by 4 bytes (for analog) or 4 bytes per 32-channel group (for digital) in the process image.

5.1 Default Address Map Comparison

Channel group CPU 314 IFM default CPU 312C default
DI byte 0 / 1 I 0.0 - I 1.7 (16 DI) I 124.0 - I 125.1 (10 DI)
DO byte 0 / 1 Q 0.0 - Q 1.7 (16 DO) Q 124.0 - Q 124.5 (6 DO)
AI word 0 - 3 PIW 128 - 134 (4 AI) Not present
AO word 0 PQW 128 (1 AO) Not present
Counter 0 / 1 Integrated via IFM FB Z0 (input I 124.0 - I 124.3), Z1 (input I 124.4 - I 124.7), 10 kHz

Notice that the 312C maps its onboard I/O into the high process image area (byte 124 and above) so that user expansion SMs occupy the lower addresses in the default configuration. This is the opposite convention from the 314 IFM and means the same physical input that was I 0.0 on the 314 IFM will become I 124.0 (or any address you wire on the new SM) on the 312C.

5.2 Using the Rewire Function

STEP 7 V5.5 provides a rewire tool that scans the entire program for absolute address operands and rewrites them. To use it:

  1. Open the S7 program in SIMATIC Manager.
  2. Open the OB1 (or any block where absolute addresses appear).
  3. Select Options > Rewire.
  4. Enter the old address (for example, I 0.0) in the Old Address column and the new address (for example, I 124.0) in the New Address column.
  5. Click Rewrite. The tool walks the entire S7 program, all DBs, all FBs, and all instance DBs.
  6. Repeat for each address that moved.

For bulk changes, build a rewire table in an Excel sheet first. Typical 314 IFM to 312C rewiring example:

Old address (314 IFM) New address (312C) Direction
I 0.0 - I 0.5 I 124.0 - I 124.5 DI
I 0.6 - I 1.7 I 0.0 - I 1.1 (on added SM 321 DI16) DI
Q 0.0 - Q 0.5 Q 124.0 - Q 124.5 DO
Q 0.6 - Q 1.7 Q 0.0 - Q 1.1 (on added SM 322 DO16) DO
PIW 128 - 134 PIW 288 - 294 (on added SM 334 AI4/AO2) AI
PQW 128 PQW 288 (on added SM 334 AI4/AO2) AO

Confirm the new SM addresses by opening HW Config and reading the I column directly - never assume the address offsets shown in the catalog.

6. STEP 7 Project Compatibility and Hardware Reconfiguration

Both CPUs are programmed with STEP 7 V5.x. The conversion path is:

  1. Open the existing .s7p project in SIMATIC Manager.
  2. Right-click the S7-300 station and choose Open HW Config.
  3. Delete the old CPU 314 IFM from slot 2.
  4. Drag the new CPU 312C (6ES7312-5BF04-0AB0) from the hardware catalog into slot 2. The catalog entry is under SIMATIC 300 > CPU 300 > CPU 312C.
  5. Insert the SM 321, SM 322, and SM 334 (or whatever analog module you chose) into the slots immediately right of the CPU.
  6. Run the rewire pass described in section 5.2.
  7. Compile and save the HW Config. STEP 7 will write a new System Data block and update the module addresses.
  8. Download the new hardware configuration to the CPU (or to PLCSIM for offline testing - see section 8).

STEP 7 will not automatically rewrite the program for you. Address changes and DB length changes have to be tracked manually. A common error is leaving the old system data blocks in the project; the download will report "SDB mismatch" and the CPU will keep the old configuration in Flash until the new SDBs are loaded.

6.1 Library Block Re-use

If the existing 314 IFM program called IFM-specific FBs (for example, the integrated analog input handling FB or the IFM-specific counter FB), the matching FBs for the 312C live in the Standard Library under > Standard Library > S7 - SFB / SFC or > Standard Library > PID Control. The 312C ships with integrated counter and frequency measurement FBs:

Function 314 IFM equivalent 312C FB/FC
Up/down counter with gate IFM-specific block SFB 47 "COUNT" or FC 0 (counter 0), FC 1 (counter 1)
Frequency measurement IFM-specific block SFB 48 "FREQUENC" or FC 2 (frequency 0), FC 3 (frequency 1)
Pulse-width modulation Not available on IFM SFB 49 "PULSE" (CPU 312C with -5BF04 supports up to 2 channels)

These SFBs are in the S7-300 Standard Library and must be present in the S7 program for the counters to work. If the 314 IFM program was based on a vendor-supplied FB that wrapped the IFM function block, replace that wrapper with the standard SFB call in the new project.

7. Instruction Set and Integrated Function Block Differences

The STEP 7 instruction set is essentially identical between the two CPUs, but there are edge cases where the IFM vendor FBs (FC 90 - FC 99 range on the 314 IFM) have no direct equivalent on the 312C and must be rewritten.

  • Analog scaling: The 314 IFM scales onboard AI via FC 105 (SCALE) and FC 106 (UNSCALE) calls already in the program. The 312C must scale the SM 334 inputs identically; the FC 105/FC 106 calls in the user code do not need to change, only the source address changes.
  • Hardware interrupts: The 312C supports OB 40 hardware interrupts on the digital inputs; the 314 IFM does not expose hardware interrupts in the same way. If the existing program was tied to an IFM event OB, re-target the event to OB 40 in the new HW Config.
  • Diagnostic interrupts: The 312C supports OB 82 on the digital SMs; the 314 IFM used a different diagnostic block. Re-target the diagnostic OB in HW Config.
  • Time-of-day interrupts: Both support OB 10 - OB 17. The configuration under CPU Properties > Time-of-Day Interrupts is functionally identical.
Tip: Use the STEP 7 Reference Book (Help > Contents > Reference Books > System and Standard Functions) to confirm SFB/FC numbers before assuming they exist on the 312C. Some FBs marked "IFM" in older projects are not part of the S7-300 standard library and will need to be removed or re-implemented.

8. Pre-Migration Validation with S7-PLCSIM

Do not start the swap without first validating the new program against a SIMATIC S7-PLCSIM instance. PLCSIM is bundled with STEP 7 V5.5 Professional and lets you load the converted project into a virtual CPU 312C and exercise the logic before any hardware is touched.

8.1 PLCSIM Validation Procedure

  1. In SIMATIC Manager, change the target station from the real CPU to a PLCSIM instance: Options > Set PG/PC Interface > PLCSIM (MPI).
  2. Download the converted S7 program to the PLCSIM instance: PLC > Download.
  3. Place the PLCSIM CPU into RUN. The RUN LED will toggle in the PLCSIM toolbar.
  4. Force inputs in the PLCSIM I/O view to simulate the field conditions (a typical sweep is: each DI, each AI range 4 mA and 20 mA, each counter pulse train at 1 kHz and 10 kHz).
  5. Verify each output with the PLCSIM output view. The 312C outputs do not actually switch any field wiring, so this step is safe to do in the office with no rack connected.
  6. Run through the OB 100 startup, OB 1 scan, OB 35 (if used), and any OB 40 hardware-interrupt blocks. PLCSIM will not trigger hardware interrupts for SMs that are not in the simulated rack, so add the SM 321 to the simulated rack to get OB 40 coverage.

PLCSIM will catch the most common migration errors before the field engineer ever opens the cabinet: rewire mistakes, SDB download failures, missing FBs, and OB misconfigurations. If a customer schedules a 4-hour outage for the swap, PLCSIM validation is the difference between a clean exchange and a 14-hour troubleshooting session.

9. Step-by-Step Migration Procedure

Use this procedure as the field runbook. Total downtime for a clean swap is typically 1 - 2 hours if PLCSIM validation is complete and the new SMs are pre-wired.

9.1 Prerequisites

  • New CPU 312C, MLFB 6ES7312-5BF04-0AB0, with firmware version 3.3 or later
  • Micro Memory Card sized for the program (typically 2 MB or 4 MB)
  • Signal modules to compensate for missing onboard I/O (section 3.1 - 3.2)
  • STEP 7 V5.5 + SP2 or later installed on the engineering station
  • SIMATIC S7-PLCSIM V5.4 SP5 or later for offline validation
  • Front connector for the 312C (1 x 40-pin, MLFB 6ES7392-1AM00-0AA0)
  • Updated wiring diagram, updated bill of materials, updated I/O list with new addresses

9.2 Procedure

  1. Back up the existing S7 project, including the source SDBs, to a safe location. Use the menu PLC > Upload Station to PG, save the resulting .s7p and a copy of the source SDBs.
  2. In SIMATIC Manager, perform the hardware reconfiguration described in section 6. Save the project as a new .s7p file - keep the original untouched in case rollback is required.
  3. Run the rewire pass against the new project (section 5.2). Save and compile.
  4. Validate against S7-PLCSIM (section 8). Document the test results in the change log.
  5. Schedule the outage. During the outage, place the plant in a safe state (drives disabled, valves in a defined position, safety circuits held).
  6. Power down the S7-300 rack. Discharge any 24 V DC bus on the DIN rail.
  7. Remove the CPU 314 IFM and label all front-connector wiring with the slot number and pin number.
  8. Remove the front connector(s) from the 314 IFM. Note that there are two front connectors; tag them as "FC1" and "FC2" to avoid mixing them up with the single connector that will go on the 312C.
  9. Install the new SM 321, SM 322, and SM 334 (or whichever expansion modules you chose) in the empty slots to the right of slot 2. Tighten the module screws to the specified torque (0.8 - 1.1 Nm on the S7-300 rail).
  10. Insert the CPU 312C into slot 2. Verify the coding key on the back of the module is correct for the slot.
  11. Insert the Micro Memory Card into the MMC slot of the 312C before powering on. The MMC must be pre-loaded with the new S7 program; do this with a PC and a SIMATIC USB prommer (MLFB 6ES7792-0AA00-0XA0) or by downloading to the MMC after the CPU is in STOP.
  12. Wire the 40-pin front connector to the 312C. Wire the new SMs to their own front connectors. Cross-check the field-side wiring against the updated wiring diagram.
  13. Power up the rack. The CPU 312C performs a RAM test and then attempts to load from MMC. The STOP LED should be solid yellow during this phase.
  14. Connect the engineering station via MPI. From SIMATIC Manager, perform a full download: PLC > Download > to Target System. Select all blocks and SDBs.
  15. Place the CPU in RUN. Verify that OB 1 scans without SF (system fault), BF (bus fault), or BATF (battery fault) LEDs. The SF LED is the most important - any solid SF after the swap indicates a hardware configuration error or a rewire mistake.
  16. Walk through the I/O checkout. For every DI: force the field device and confirm the input bit in the VAT or PLCSIM-equivalent online view. For every DO: command the output bit to 1 and confirm the field voltage. For every AI: apply a known reference (4 mA and 20 mA) and confirm the engineering value. For every AO: command a known output value and confirm the field voltage/current with a calibrated meter.
  17. For the integrated counters, exercise each one with a pulse train from a signal generator. Confirm the count value in the instance DB and the direction bit behaviour at the gate input.
  18. Hand the system back to operations. Update the as-built wiring diagram, the I/O list, and the backup of the S7 project.

10. Hardware Commissioning and Verification

Commissioning is the last gate before the line runs production. Use this checklist:

10.1 LED Verification

LED Expected state in RUN If not...
SF (red) Off Check the diagnostic buffer (PLC > Diagnostic Buffer). Most common cause: SDB download error or missing SM in the simulated rack.
BF (red) Off Bus fault - check the MPI cable and the DP segment if the 312C is in DP master mode.
BATF (red) Off Battery is not present or MMC write cycles exceeded. The 312C uses the MMC in place of the battery-backed RAM, so this LED typically indicates MMC write-protection is engaged or the card is full.
DC 5V (green) On Backplane power fault - check the 24 V DC supply to the CPU.
RUN (green) Solid on or flashing Flashing at 2 Hz = stop requested by the PG or by the user program. Flashing at 0.5 Hz = firmware update in progress.
STOP (yellow) Off in RUN, on in STOP If STOP stays on after a download, the most common cause is a syntax error in the rewire pass or a missing system data block.

10.2 Diagnostic Buffer Inspection

Open the diagnostic buffer (PLC > Diagnostic Buffer) and walk the last 10 events top-down. The buffer always logs the cause of the most recent stop. The most useful events for a 314 IFM to 312C migration are:

  • "Stop by programming device" - normal if you stopped the CPU to download
  • "STOP because of missing or defective module" - usually a slot not populated that the SDB expects
  • "Parameter assignment error" - the SM 334 needs a different measuring range module than the 314 IFM had configured
  • "Communication error" - MPI or DP address conflict

10.3 Time-Out and Scan Time Validation

Use PLC > Module Information > Scan Cycle Time to record the OB 1 minimum, maximum, and current scan time. The 312C is roughly 30 percent faster per bit instruction than the 314 IFM, so a faster scan is expected. If the scan time drops by more than 50 percent, the rewire pass may have removed a call to a heavy FB (such as a PID block) by accident - check the cross-reference list (Options > Reference Data > Display).

11. Troubleshooting Matrix

Symptom Likely cause Action
SF LED on, CPU in STOP, diagnostic buffer shows "SDB error" New SDBs not downloaded, or the old SDBs still in the project PLC > Download > to Target System. Confirm "All blocks" and "System Data" are checked.
Inputs read true in the program but the field device is off Rewire missed an operand, or the bit is inverted in the field wiring Compare the new I/O list to the field wiring. Use cross-reference to find every read of the old address.
Counter does not count The SFB 47 / SFB 48 instance DB was not downloaded with the rest of the program Check the S7 program for instance DBs that reference the counters. Download all DBs.
Analog value reads 0 or 32767 (overrange) Wrong measuring range on the SM 334, or the FC 105 scale call is using the wrong PIW address Open HW Config, click the SM 334, set the measuring range to "4 - 20 mA" or "0 - 10 V" as required. Verify FC 105 IN pointer.
CPU does not start, SF + BATF on MMC not present or write-protected Remove the MMC, confirm the write-protect slider is in the unlocked position, reinsert.
MPI connection from PG to CPU times out MPI address conflict - the 312C default MPI address is 2, same as the 314 IFM, but if a different MPI node is on the bus at the same address it will collide Check the MPI bus with a bus monitor. Re-address the new CPU via HW Config > CPU Properties > MPI Address if needed.
OB 40 hardware interrupt does not fire Hardware interrupt OB not assigned in HW Config on the new SM 321 Click the DI module in HW Config, go to Inputs tab, assign OB 40 to the relevant input channel.
Retentive flags lost on power cycle Retentive range not configured on the 312C, or MMC has been replaced with a non-retentive card CPU Properties > Retentive Memory. Confirm MB0 - MB15 (or the application range) is marked retentive.
Field device wired to old "FC1" connector on 314 IFM is now dead FC1 wired devices must move to the 312C single front connector or to the new SMs Use the updated wiring diagram. Do not assume pin-for-pin continuity between the two 40-pin connectors and the new 40-pin connector on the 312C.
PLCSIM tests pass but the real CPU stays in STOP The downloaded SDBs reference a slot that is empty on the real rack Compare the rack layout in HW Config to the physical rack. Either populate the missing slot or remove the module from HW Config and re-download.

12. Frequently Asked Questions

Is the CPU 312C a drop-in replacement for the CPU 314 IFM?

No. The 312C has fewer onboard digital I/O channels (10 DI / 6 DO versus 16 / 16), no onboard analog channels, and only one 40-pin front connector. You must add SM 321 / SM 322 / SM 334 modules, rewire the field, and run a rewire pass in STEP 7 to move absolute addresses to the new layout.

What is the default MPI address of the CPU 312C (6ES7312-5BF04-0AB0)?

The factory default MPI address is 2, the highest MPI address is 31, and the default MPI transmission rate is 187.5 kbit/s. If a 314 IFM was already at MPI address 2 on the bus, change the new CPU to a free address via HW Config > CPU Properties > MPI Address before connecting it to the live MPI bus.

Does the CPU 312C need a Micro Memory Card to operate?

Yes. Without an MMC inserted, the 312C will not leave STOP and the SF and BATF LEDs will be lit. Order an industrial MMC sized for the program - 2 MB (6ES7953-8LL20-0AA0) is the typical choice for a 312C project up to 1 MB code/data.

Can I reuse the 314 IFM program without rewriting FBs?

Partial reuse is possible. The STEP 7 instruction set is identical, so FC 105 / FC 106 (SCALE / UNSCALE) and the standard timer/counter instructions work as-is. However, any IFM-specific FBs (FC 90 - FC 99 range on the 314 IFM) must be removed and replaced with the S7-300 standard library equivalents - SFB 47 (COUNT), SFB 48 (FREQUENC), and SFB 49 (PULSE) - and the corresponding instance DBs must be downloaded with the program.

How can I validate the migration before taking the real rack down?

Use S7-PLCSIM. Set the PG/PC interface to PLCSIM (MPI), load the new S7 project, and exercise the OB 1, OB 35, and OB 40 blocks with forced inputs. PLCSIM will not detect wiring or analog calibration issues, but it will catch rewire mistakes, SDB download errors, missing FBs, and OB misconfigurations - the four most common reasons a migration fails to start in the cabinet.

What is the maximum number of I/O modules supported on the CPU 312C?

Up to 8 SM/FM modules, the same maximum as the CPU 314 IFM. The total backplane width is also identical at 830 mm with a 480 mm rack. The migration does not require a new rack if the existing rack has free slots; it only requires the new SMs to be added to those slots in HW Config and physically wired.

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