Scheduling Siemens S7 PLC Digital Outputs via SFC0 SFC1

Overview

Scheduled activation of digital outputs based on the PLC real-time clock is a recurring requirement in industrial automation: a beacon must come on at 06:00 sharp, a relay must energize at the end of a shift, a pre-cooling cycle must start at a programmed future date, or a sanitation rinse must trigger at 02:00 every Sunday. On the Siemens SIMATIC platform, two complementary blocks cover this use case across the entire S7 family:

• SFC1 "READ_CLK" reads the current CPU date and time.
• SFC0 "SET_CLK" writes a new date and time into the CPU.

For S7-300 (CPU 312 through CPU 319F) and S7-400 (CPU 412 through CPU 417), SFC0 and SFC1 are part of the standard library shipped with every STEP 7 V5.x installation and the TIA Portal "S7-300/400" option. For S7-200, the equivalent instructions are the subroutines READ_RTC and SET_RTC. For S7-1200 and S7-1500, the legacy SFC interface is replaced by the TIA Portal instructions RD_SYS_T and WR_SYS_T, which operate on the modern 12-byte DTL (Date_And_Time_Long) data type and support direct comparison without BCD conversion.

This article documents a complete, repeatable procedure to read the CPU clock, convert it from BCD to integer, compare it against a target date/time, and drive a digital output exactly when the wall clock reaches the scheduled instant. Edge cases (year boundary, DST, battery failure, single-trigger race), platform variants (S7-200, S7-300, S7-400, S7-1200, S7-1500), and a troubleshooting matrix are included.

Prerequisites

• Siemens S7-300 (CPU 312/314/315/316/317/319) or S7-400 (CPU 412/414/416/417) with STEP 7 V5.5 SPx or TIA Portal V13 SP1+ configured and online-capable.
• Standard library installed (SFC0, SFC1, and the IEC function blocks are included in every STEP 7 install; verify under "Libraries → Standard Library → System Function Blocks").
• For S7-1200/S7-1500: TIA Portal V13 or later with the extended "Date and Time" instructions.
• Output module (e.g., SM322 DO16 or SM332) wired to the actuator; verify the wiring diagram and the process image address (e.g., Q4.0).
• Functional backup battery in the CPU (3.6 V lithium, type 3AGM for S7-300); a missing battery causes the clock to revert to a default value on every power cycle.

Understanding DATE_AND_TIME (DT) Format

SFC0 and SFC1 exchange the date and time as an 8-byte DATE_AND_TIME (DT) structure. Every byte is BCD-encoded, which means each nibble stores one decimal digit. This format is preserved end-to-end from the CPU's hardware clock through the SFC interface into the application data block.

Because the year 2090 is the next century boundary, any logic that crosses 2089 → 2090 must be revisited. The Siemens recommendation is to migrate such logic to the S7-1500 DTL data type, which stores the year as a UINT in the range 1970-2554.

SFC1 READ_CLK - Reading the CPU Clock

SFC1 is the standard way to obtain the current date and time inside the user program. The function is stateless and can be called from OB1, OB35, OB82, OB100, or any cyclic organization block.

Standard call pattern in STL:

CALL "READ_CLK"
     RET_VAL := MW100
     CDT     := DB101.CurrentTime

On success, MW100 contains 0 and DB101.CurrentTime is populated with the current values. On a CPU without a working battery that has never had SFC0 executed, SFC1 may return RET_VAL = W#16#8081 ("clock not set"); subsequent bytes may also be invalid. Always check RET_VAL before consuming the date/time in your scheduling logic.

SFC0 SET_CLK - Writing the CPU Clock

SFC0 accepts a properly populated DATE_AND_TIME input and writes it to the CPU's hardware real-time clock. Typical use cases are:

• Initial time set after battery replacement.
• Time broadcast from an HMI acting as the time master.
• Programmatic resync after NTP time arrives at the CPU.

STL example, where the target time has been pre-formatted in DB102:

CALL "SET_CLK"
     RET_VAL := MW102
     PDT     := DB102.NewTime

S7-200 Variant - READ_RTC and SET_RTC

The S7-200 (CPU 21x, 22x, 224, 224XP, 226) does not expose SFC0/SFC1; instead, the Clock Instructions library ships with two reusable subroutines (SBR_RTC and SB_RTC, commonly named READ_RTC and SET_RTC). Each subroutine uses 8 bytes of V memory to hold year/month/day/hour/minute/second + reserved byte + error code in BCD. The start address is supplied on input T.

Call sequence in the S7-200 main program (OB1):

NETWORK 1 // Read the clock
      CALL SBR 0, VB100

Each V memory byte is then available as a separate BCD byte and can be compared with BCD comparison instructions such as =B, >B, <B.

S7-1200 and S7-1500 Variant - RD_SYS_T / WR_SYS_T

The legacy SFC interface was retired for S7-1200 and S7-1500. The replacement is a pair of extended instructions in TIA Portal:

DTL Structure

Procedure - Activate a Digital Output at a Future Time on S7-300/400

Step 1 - Create the Schedule Data Block

Open the S7 project in STEP 7 and create a new shared DB (e.g., DB100). Define a structure that holds the target date/time in BCD, an "already triggered" latch, and the output status. The BCD initialization is critical: each value must be a valid BCD byte, meaning each nibble is in the range 0-9.

DATA_BLOCK DB100
TITLE = 'Scheduled Output Trigger'
STRUCT
  Target_Year    : BYTE := B#16#25;    // 2025 (BCD 25h)
  Target_Month   : BYTE := B#16#12;    // December (BCD 12h)
  Target_Day     : BYTE := B#16#31;    // 31 (BCD 31h)
  Target_Hour    : BYTE := B#16#23;    // 23
  Target_Minute  : BYTE := B#16#59;    // 59
  Target_Second  : BYTE := B#16#00;    // 00
  Triggered      : BOOL := FALSE;
  OutputActive   : BOOL := FALSE;
END_STRUCT
END_DATA_BLOCK

Step 2 - Create the Clock Buffer DB

The clock buffer stores the raw DATE_AND_TIME output of SFC1. Declare a separate DB (e.g., DB101) with a single DT field:

DATA_BLOCK DB101
STRUCT
  CurrentTime : DATE_AND_TIME;
END_STRUCT
END_DATA_BLOCK

Step 3 - Call SFC1 from OB1

NETWORK 1  // Read CPU clock
      CALL "READ_CLK"
           RET_VAL := MW100
           CDT     := DB101.CurrentTime

Step 4 - Convert BCD Bytes to Integer

SFC1 returns BCD-encoded bytes. STEP 7 comparison operators such as >=I operate on integers, so each BCD byte must be converted. Siemens provides FC 21 "BCD_TO_INT" (also known as I_BCD or implemented inline as BTD 1 IWx). Use it for each field, or write a single FC that converts all eight bytes.

NETWORK 2 // Convert year, month, day
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.YEAR
           RET_VAL := MW102       // integer year
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.MONTH
           RET_VAL := MW104       // integer month
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.DAY
           RET_VAL := MW106       // integer day

NETWORK 3 // Convert hour, minute, second
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.HOUR
           RET_VAL := MW108
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.MINUTE
           RET_VAL := MW110
      CALL "BCD_TO_INT"
           BCD     := DB101.CurrentTime.SECOND
           RET_VAL := MW112

Step 5 - Implement the Comparison Logic

The output should be set when the current time has reached (or passed) the target. Use a chained ladder network where each subsequent comparison only fires if the previous one passed. This correctly handles months, days of month, and leap years.

NETWORK 4 // Year comparison
      L     MW102
      L     DB100.Target_Year_INT     // pre-converted target
      >=I
      JCN   YEAR_LOW

NETWORK 5 // Month
      L     MW104
      L     DB100.Target_Month_INT
      >=I
      JCN   YEAR_LOW

NETWORK 6 // Day
      L     MW106
      L     DB100.Target_Day_INT
      >=I
      JCN   YEAR_LOW

NETWORK 7 // Hour
      L     MW108
      L     DB100.Target_Hour_INT
      >=I
      JCN   YEAR_LOW

NETWORK 8 // Minute
      L     MW110
      L     DB100.Target_Minute_INT
      >=I
      JCN   YEAR_LOW

NETWORK 9 // Second
      L     MW112
      L     DB100.Target_Second_INT
      >=I
      JCN   YEAR_LOW

NETWORK 10 // All conditions met, set output
      S     DB100.OutputActive
      S     DB100.Triggered
YEAR_LOW: NOP 0

Equivalent representation in LAD/FBD:

|  --[ >=I  MW102  DB100.Target_Year_INT  ]--
|  --[ >=I  MW104  DB100.Target_Month_INT ]--
|  --[ >=I  MW106  DB100.Target_Day_INT   ]--
|  --[ >=I  MW108  DB100.Target_Hour_INT  ]--
|  --[ >=I  MW110  DB100.Target_Minute_INT]--
|  --[ >=I  MW112  DB100.Target_Second_INT]--( S DB100.OutputActive )

Step 6 - Drive the Digital Output

NETWORK 11 // Output to process image
      A     DB100.OutputActive
      =     Q 4.0      // first channel of SM322 DO16

Step 7 - Reset the Latch

Once the scheduled action has been acknowledged, clear the OutputActive and Triggered flags from an HMI input or a push-button input:

NETWORK 12 // Operator reset
      A     I 0.5
      R     DB100.OutputActive
      R     DB100.Triggered

Procedure - Activate a Digital Output at a Future Time on S7-1200/1500

On S7-1200 (FW 4.0+) and S7-1500, the implementation collapses because DTL is a directly comparable data type. The full SCL implementation in TIA Portal V18 is:

// Read current time
#currentTime := RD_SYS_T();

// Build target time once (e.g., in OB100)
IF #firstScan THEN
    #targetTime.YEAR   := 2025;
    #targetTime.MONTH  := 12;
    #targetTime.DAY    := 31;
    #targetTime.HOUR   := 23;
    #targetTime.MINUTE := 59;
    #targetTime.SECOND := 0;
    #alreadyTriggered  := FALSE;
END_IF;

// Compare and latch
IF (#currentTime >= #targetTime) AND NOT #alreadyTriggered THEN
    "Output_Active"   := TRUE;
    #alreadyTriggered := TRUE;
END_IF;

No BCD conversion, no DT structure parsing, and no manual chaining of comparison operators are required. The same code style works for any scheduling granularity from 1 second up to 1 year, limited only by the precision of the DTL type (nanosecond resolution on S7-1500, millisecond on S7-1200).

Output Module Wiring Reference

Confirm the channel address in your hardware configuration before commissioning. STEP 7 → HW Config → slot → Properties shows the start address used by the process image.

Date/Time Arithmetic: Adding Hours to a Target

For repeating schedules (every Monday at 06:00), use the IEC function blocks SB_DT_T (subtract TIME from DT), AD_DT_T (add TIME to DT), SB_T_DT, and AD_T_DT from the standard library. They correctly handle month and year roll-overs:

// Compute next-run time = previous-run time + 24h
CALL "AD_DT_T"
     T1    := DB101.LastTriggerTime
     T2    := T#24h
     D     := DB101.NextTriggerTime

Combined with a self-resetting latch and a cyclic OB, this yields a 24-hour repeating schedule without operator intervention. For weekly or monthly cycles, multiply the time interval accordingly (T#168h for weekly, T#720h for 30-day averages).

Periodic Scheduling with OB35

To reduce CPU load, place the scheduling logic in a cyclic interrupt OB (OB35 default 100 ms) instead of OB1. Adjust OB35 execution time under Hardware → Properties → CPU → Cyclic Interrupts. Avoid setting OB35 below 10 ms on S7-300/400 because SFC1's call itself takes several hundred microseconds.

Clock Synchronization Patterns

NTP (S7-1200/1500 only)

S7-1500 (FW 2.0+) and S7-1200 (FW 4.4+) accept NTP directly. In TIA Portal, configure PROFINET interface → Time-of-day synchronization → "Synchronize via NTP" and supply up to four NTP server addresses. The CPU updates its internal clock every poll interval (default 10 s). Drift is bounded by the network latency to the time server.

HMI as Time Master

For S7-300/400, configure the WinCC Unified or WinCC Comfort/Advanced panel as the time master via "Connections → Date/Time pointer". The HMI writes its local clock to the PLC at a configurable interval (1-60 s). This compensates for battery drift on the PLC side.

SCADA Time Broadcast

SCADA systems (WinCC, Ignition, FactoryTalk View) can broadcast the time to multiple PLCs simultaneously. On Allen-Bradley ControlLogix/CompactLogix platforms used alongside Siemens, the GSV (Get System Value) instruction reads the WALL_CLOCK_TIME attribute, and SSV writes it. Cross-vendor time sync is typically implemented with NTP rather than vendor-specific protocols.

Diagnostic OBs for Clock and Battery

Troubleshooting Matrix

Edge Cases and Field Notes

Century Boundary in BCD

SFC0/SFC1 use BCD year encoding where 90-99 represents 1990-1999, while 00-89 represents 2000-2089. A naive integer comparison "MW102 >= 25" fires both in 2025 (BCD 25h) and in 1925 (BCD 25h interpreted as 1925). The recommended correction:

NETWORK // Century correction for year
      L     MW102         // integer year (post-BCD-to-int)
      L     90
      <I                 // if MW102 < 90, treat as 2000s
      JC    ADD_2000
      L     1900
      +I
      JU    STORE_Y
ADD_2000: L 2000
          +I
STORE_Y:  T MW120        // correct integer year

Daylight Saving Time

S7-300/400 do not natively handle DST. The clock value reflects whatever was last written via SFC0 or set from the HMI/NTP master. For installations that observe DST, the time master (WinCC, NTP server, or SCADA) is responsible for pushing the adjusted wall-clock value via SFC0/WR_SYS_T.

Leap Years and Invalid Dates

SFC0 silently accepts BCD values such as "February 30" and writes them into the clock; the CPU does not validate calendar correctness. Always pre-validate the target DT before calling SFC0, and document the assumed rules (Gregorian, proleptic Gregorian, etc.).

Single-Trigger Race Condition

After the target time passes, every subsequent scan continues to satisfy the comparison chain. The latch flag (Triggered) prevents repeated transitions of the digital output and is the canonical pattern. Always reset Triggered from a controlled operator input, not from the same comparison logic.

Output Held Past Intended Duration

Combine the time-based trigger with a watchdog timer to release the output after a defined period. Recommended pattern:

// After OutputActive is set, start a 30-minute on-delay timer
A     DB100.OutputActive
L     S5T#30m          // 30 minutes (S5 time format)
SD    T50
A     T50
=     Q 4.0            // output held only while timer running

When the scheduled time arrives, OutputActive is set, timer T50 starts, and Q4.0 is energized for 30 minutes. The timer auto-resets when OutputActive is reset by the operator.

Multi-Event Scheduling

For plants with dozens of scheduled events, define an array DB and loop through it in OB35. Each entry contains a target DT, an output bit address, and the latched flag.

DATA_BLOCK DB200
TITLE = 'Weekly Schedule'
STRUCT
  Event : ARRAY[1..50] OF STRUCT
    TargetDT : DATE_AND_TIME;
    OutputBitAddr : BYTE;       // 0 = Q0.0, 1 = Q0.1, etc.
    OutputBitMask : BYTE;
    Latched : BOOL;
    Enabled : BOOL;
  END_STRUCT;
END_STRUCT
END_DATA_BLOCK

A loop in OB1 compares each entry against the current time and sets the corresponding output bit. For 50 entries called once per OB1 cycle, total scan time overhead is typically under 5 ms on a CPU 315-2 PN/DP.

Platform Comparison

Cross-Platform Reference: AB Logix Equivalent

Engineers maintaining mixed fleets can map this pattern to Allen-Bradley ControlLogix/CompactLogix:

// Read the Logix WALL_CLOCK_TIME
GSV   WallClockTime Year   YearInt
GSV   WallClockTime Month  MonthInt
GSV   WallClockTime Day    DayInt
GSV   WallClockTime Hour   HourInt
GSV   WallClockTime Minute MinuteInt
GSV   WallClockTime Second SecondInt

// Compare and set output
GRT   YearInt   Target_Year  Year_OK
GRT   MonthInt  Target_Month Month_OK
GRT   DayInt    Target_Day   Day_OK
GRT   HourInt   Target_Hour  Hour_OK
GRT   MinuteInt Target_Min Min_OK
GRT   SecondInt Target_Sec  Sec_OK
AND   Year_OK  Month_OK  Day_OK  Hour_OK  Min_OK  Sec_OK  OTE  OutputActive

The Logix GSV/SSV pattern returns binary integers and avoids the BCD conversion step entirely, mirroring the S7-1500 DTL simplification.

Verification Checklist

• [ ] SFC1 reads valid time (DB101.CurrentTime populated, MW100 = 0).
• [ ] Each BCD byte converts to a sensible integer (MW102-MW112 in range).
• [ ] DB100 target fields entered in valid BCD (no letter characters, no nibble > 9).
• [ ] Output Q4.0 energizes at the scheduled second (multimeter reads 24 VDC).
• [ ] Triggered latch holds the output after target time; not re-triggered on subsequent cycles.
• [ ] Operator reset clears OutputActive and Triggered flags.
• [ ] OB81 does not fire (battery healthy).
• [ ] Watchdog timer releases Q4.0 after the intended duration.
• [ ] NTP or HMI master sync is active; drift < 1 second per hour observed over 24 hours.
• [ ] HMI displays the current CPU time and confirms the scheduled trigger.

Best Practices Summary

1. Always check the RET_VAL of SFC0 and SFC1. A non-zero return means the clock operation failed.
2. Pre-validate calendar correctness before calling SFC0 to avoid writing Feb 30.
3. Use the century-offset fix for any year-sensitive scheduling, or migrate to S7-1500 DTL.
4. Add a watchdog timer to release the output after a safe duration.
5. Log every scheduled action to a ring-buffer DB for forensic review.
6. Initialize the Triggered latch from OB100 on every restart to prevent stale state.
7. Synchronize the PLC clock via NTP or HMI master to avoid drift.
8. Add an enable interlock on the output rung; never drive field actuators from time alone.

Frequently Asked Questions