MD10 through SFB47. The configuration and logical address were consistent; the confirmed fault was wiring the pulse and direction switches to the wrong physical connector.
Reported HSC Configuration
| Item | Configured value |
|---|---|
| CPU order number | 6ES7 313 5BF03 0AB0 |
| I/O address range | 768 through 783 |
| Counter channel | Channel 0, continuous counting |
| Signal evaluation | Pulse/direction |
| Hardware gate | None |
SFB47 execution |
OB1 |
LADDR |
16#300 |
| Software gate | TRUE |
| Count output | MD10 |
16#300 equals decimal 768, so the supplied LADDR matches the start of the configured I/O range. This evidence does not indicate an address mismatch or a closed software gate.
Pulse/Direction Input Assignment
In pulse/direction mode, channel 0 receives pulses on DI+0.0 and the direction state on DI+0.1. Changing only the direction input does not create a count; the counter requires transitions on the pulse input. The reported test also held DI+0.1 while switching DI+0.0, so the absence of counting pointed beyond direction selection.
Confirmed Root Cause and Correction
The switches had been landed on connector positions 22 and 23, while the required DI+0.0 and DI+0.1 points were identified as connector positions 2 and 3 on the correct connector. The pulse input had effectively been wired to the next rail rather than the channel 0 HSC input.
- Keep channel 0 configured for continuous pulse/direction counting.
- Move the pulse signal to
DI+0.0at connector position 2. - Move the direction signal to
DI+0.1at connector position 3. - Run
SFB47inOB1withLADDR := 16#300, channel 0, and the software gate set toTRUE.
Verification
Monitor MD10 online while generating transitions at DI+0.0. Hold DI+0.1 in one state and confirm that the count changes in one direction; change the direction state and repeat the pulse test to check the opposite direction. If MD10 remains unchanged, verify the physical connector and terminal identification before changing the block parameters.
FAQ
A true software gate is insufficient if the pulse is wired to the wrong connector. For this reported channel 0 setup, apply the pulse to DI+0.0 at connector position 2.
The supplied configuration uses DI+0.0 for the pulse and DI+0.1 for direction. The direction input selects direction but does not generate count events.
Does LADDR 16#300 match an HSC address starting at 768?
Yes. Hexadecimal 16#300 equals decimal 768, matching the reported I/O range of 768 through 783.