1. Overview of the Masterdrive Jog Function
The Siemens MASTERDRIVE Vector Control (VC) family — designated MLFB series 6SE70 — supports a dedicated jogging / inching mode that is independent of the normal ramp-driven run-up. Jog operation is selected through two bits of Control Word 1 (STW1, word 0 of PZD output) and produces setpoint-driven motion at fixed, pre-configured speeds. The most common application is machine setup, where an operator pulses the drive forward and reverse at low speed without modifying the main process setpoint (P401/P402 or analog/PID sources).
Two BICO parameters govern the source selection for the jog bits:
| Parameter | Mnemonic | Description | Default |
|---|---|---|---|
| P568 | Src Jog Bit0 | BICO binector that supplies Control Word 1 Bit 8 (jog bit 0) | B3108 |
| P569 | Src Jog Bit1 | BICO binector that supplies Control Word 1 Bit 9 (jog bit 1) | B3109 |
The actual logic is driven by the binary combination of these two bits. The Compendium (Function Diagram page 3-16 and chapter 9 around page 9-4) defines the four valid states, which are commonly mis-documented in the parameter list itself:
| Bit 1 (P569) | Bit 0 (P568) | Drive behavior | Setpoint source |
|---|---|---|---|
| 0 | 0 | No jog / normal operation | Main setpoint (P401/P402) |
| 0 | 1 | Jog setpoint 1 | P448 (jog setpoint 1) |
| 1 | 0 | Jog setpoint 2 | P449 (jog setpoint 2) |
| 1 | 1 | Switch to inching mode, hold last setpoint | Internal latched |
In a typical S7-400 setup, bit 8 of STW1 is treated as Jog Forward at the P448 speed and bit 9 as Jog Reverse at the P449 speed. The drive ramps internally between the running setpoint and the jog setpoint when either bit is asserted while ON/OFF1 and Inverter Enable are present.
2. Prerequisites and Hardware Configuration
Before configuring the jog parameters, verify the following:
- The drive is a 6SE70 MASTERDRIVE VC (Vector Control) or MC (Motion Control) chassis. Compact and chassis variants use identical BICO for jog.
- The optional communications board is installed: CBP2 (Profibus) or CBP (Profibus on early units). The Profibus slave address must be set via the drive DIP switches or P918 (CB/TB slave address).
- The S7-400 PLC uses a CPU 414-2 DP (order number 6ES7414-2XJ04-0AB0 or later) with at least one Profibus DP master port.
- DriveMonitor or Simovert commissioning software is available for parameter upload/download via the RS232 service port or USS.
- GSD file
SIEM8047.GSD(CBP2) is imported into the STEP 7 HW Config. Slot 4 (Standard Telegram 1, PPO type 1) or PPO type 4 is the typical selection for drives that need only 2 words of control / 2 words of status. Slot 8 / PPO type 5 is used when extended data (e.g., the second control word for safety functions) is required.
3. Control Word 1 Bit Layout and Default Assignment
Control Word 1 is mapped to PZD1 in the Profibus output area. The default bit layout for a 6SE70 is:
| Bit | Mnemonic (default) | Function |
|---|---|---|
| 0 | ON/OFF1 | Ramp-up command (positive edge); 0 = ramp down with P464 deceleration |
| 1 | OFF2 | 0 = coast to stop (no ramp); 1 = enable |
| 2 | OFF3 | 0 = quick stop with P466; 1 = enable |
| 3 | Inverter Enable | 1 = inverter pulses enabled; 0 = pulses inhibited (terminal stage) |
| 4 | Ramp Generator Enable | 1 = ramp generator active; 0 = ramp output frozen |
| 5 | Ramp Hold | 1 = hold integrator (start freeze) |
| 6 | Setpoint Enable | 1 = release setpoint to motor model |
| 7 | Acknowledge Fault | Positive edge resets fault state |
| 8 | Jog Bit 0 | Forward jog, speed = P448 |
| 9 | Jog Bit 1 | Reverse jog, speed = P449 |
| 10 | Control by PLC | 1 = PLC is master, 0 = local/manual |
The default binector sources for the jog bits are:
-
P568 = B3108— bit 8 of Control Word 1 -
P569 = B3109— bit 9 of Control Word 1
Binector B3108 is the output of the control word decoder in the CBP board firmware; it is high whenever the host PLC writes bit 8 of STW1 to logical 1. The same applies for B3109 and bit 9. If the host is using the default 16-bit word alignment in the PPO image, no remapping is required.
4. Step-by-Step Parameter Configuration on the Drive
All parameters can be written from the PMU (the 7-segment / 5-digit operator panel), DriveMonitor, or from the S7-400 over Profibus using Acyclic Parameter Access (PKW channel). For commissioning it is fastest to use DriveMonitor with the standard PC cable.
4.1 Configure jog setpoints
- Set
P448 = 5.00 %(or required forward jog speed; units are % of reference speed P350 / rated motor speed). - Set
P449 = -5.00 %(negative for reverse rotation; absolute value typically equal to P448). - Verify
P462(acceleration time jog ramp) andP463(deceleration time jog ramp). Typical values are 2.0 s and 2.0 s. - Set
P464(OFF1 ramp) andP466(OFF3 / quick stop ramp) for non-jog operation.
4.2 Configure BICO source selection
- Read P568. The default value
B3108is correct for Profibus control — leave unchanged unless using a different control word source. - Read P569. Default
B3109is also correct. - Confirm with
r068 = B3108/r069 = B3109readback if your firmware exposes the active binector. - If you have remapped STW1 bits (e.g., using control word 2 for jog), you must specify the corresponding binector number. The Profibus control word decoder outputs are numbered B3100 through B3115 for STW1 and B3200 through B3215 for STW2.
4.3 Enable jog in the control sequence
Jog is only valid when the drive is in a defined state. The enabling chain is:
ON/OFF1 (bit 0) = 1 OFF2 (bit 1) = 1 OFF3 (bit 2) = 1 Inverter Enable (bit 3) = 1 Ramp Gen Enable (bit 4) = 1 (optional during jog) Setpoint Enable (bit 6) = 1 Control by PLC (bit 10) = 1 Jog Bit 0 or Bit 1 = 1 (transition)
Jog ramps use the dedicated jog ramp generators P462 / P463 regardless of bit 4 (Ramp Generator Enable). This means the operator can jog with the main ramp frozen.
5. S7-400 STEP 7 Program Structure
5.1 Hardware configuration
In HW Config, after adding the CBP2 from the device library (PROFIBUS DP > Drives > SIMOVERT > 6SE70), configure the PPO type. For jog-only control plus main run, use PPO type 1 (4 PKW + 2 PZD). PKW words carry parameter channel; PZD1 carries STW1 / ZSW1 and PZD2 carries the main setpoint HSW.
5.2 I/O addressing example
Drive slave address = 4 Output (PLC -> Drive): PQW 256 = STW1, PQW 258 = HSW Input (Drive -> PLC): PIW 256 = ZSW1, PIW 258 = HIW
5.3 ST code for jog bit management
FUNCTION_BLOCK FB_JogControl VAR bRun : BOOL; // ON/OFF1 bEnable : BOOL; // Inverter Enable bReset : BOOL; // Fault acknowledge (positive edge) bJogFwd : BOOL; // Jog forward bJogRev : BOOL; // Jog reverse wControl : WORD; // STW1 to drive wSetpoint : INT; // Main HSW (0 during jog) wControlOut: WORD; END_VAR // Build base control word wControl.%X0 := bRun; // Bit 0 ON/OFF1 wControl.%X1 := TRUE; // Bit 1 OFF2 (must be 1 to enable) wControl.%X2 := TRUE; // Bit 2 OFF3 (must be 1 to enable) wControl.%X3 := bEnable; // Bit 3 Inverter Enable wControl.%X4 := TRUE; // Bit 4 Ramp Gen Enable wControl.%X5 := FALSE; // Bit 5 Ramp Hold wControl.%X6 := TRUE; // Bit 6 Setpoint Enable wControl.%X7 := bReset; // Bit 7 Fault Acknowledge wControl.%X8 := bJogFwd; // Bit 8 Jog Bit 0 -> P568 = B3108 wControl.%X9 := bJogRev; // Bit 9 Jog Bit 1 -> P569 = B3109 wControl.%X10 := TRUE; // Bit 10 Control by PLC wControlOut := wControl; wSetpoint := 0; // Main HSW = 0 during jog END_FUNCTION_BLOCK
Bits 8 and 9 are latched by the operator panel pushbutton or HMI tag. When the jog pushbutton is released, both bits return to 0 and the drive ramps down with P463 back to standstill before honoring any other setpoint.
5.4 Consistent data read/write with SFC14/SFC15
PPO type 1 PZD area is only 4 bytes (2 words) and is not guaranteed consistent across the STEP 7 cycle. To guarantee word-pair atomicity, use SFC14 (DPRD_DAT) and SFC15 (DPWR_DAT):
CALL SFC15 LADDR := W#16#100 // Logical base address of PZD outputs (256 dec) RECORD := P#DB1.DBX0.0 WORD 2 // Source: STW1 + HSW in DB1 RET_VAL:= MW100 BUSY := M101 CALL SFC14 LADDR := W#16#100 // Logical base address of PZD inputs RET_VAL:= MW102 RECORD := P#DB2.DBX0.0 WORD 2 // Destination: ZSW1 + HIW in DB2 BUSY := M103
6. Jog Setpoint Parameters P448 and P449 in Detail
| Parameter | Mnemonic | Range | Units | Notes |
|---|---|---|---|---|
| P448 | Jog setpoint 1 | -199.99 to 199.99 | % | Forward jog speed; default typically 5.00 % |
| P449 | Jog setpoint 2 | -199.99 to 199.99 | % | Reverse jog speed; sign determines direction |
| P462 | Acceleration jog ramp | 0.0 to 650.0 | s | Active only when jog selected |
| P463 | Deceleration jog ramp | 0.0 to 650.0 | s | Active only when jog selected |
The reference base for P448 and P449 is P350 (reference speed, default = rated motor speed). A value of 10.00 % corresponds to 10 % of P350 in RPM.
7. Master/Slave Torque Control Considerations
When the Masterdrive is operating in master-follower torque control, the master is configured in speed control with torque output, and the slave runs in torque control following the master's torque demand. The torque setpoint in the master is available as a connector (KKD):
| Connector | Source | Recommended use |
|---|---|---|
| KKD 140 | Torque setpoint before current controller | Local display only |
| KKD 148 | Torque setpoint after ramp / filter | Master->slave analog wiring |
| KKD 167 | Smoothed torque actual (low-pass) | Recommended for analog master->slave |
The slave receives the master torque on its analog input (typically terminal 4/5 = AI1 / AI2). Configure the slave:
-
P100 = 4(control mode = torque control with speed limit) -
P486 = 100.0 %(torque reference; KKD 148 then maps to P486) -
P421 = 167or appropriate connector number feeding the slave's torque input - Set
P493 / P494to clamp the maximum torque for safety
For Simolink (fiber-optic ring) master-follower, the SLB board replaces analog wiring and the torque setpoint is transported in the Simolink telegram. In that case the slave uses P740 (Simolink configuration) instead of analog inputs.
8. ON/OFF1 vs Inverter Enable Clarification
Two distinct bits must both be high for the drive to release torque:
- Bit 0 (ON/OFF1): command to ramp the drive up to setpoint. 0 = ramp down with P464. Does not inhibit the inverter's IGBT pulses directly.
- Bit 3 (Inverter Enable): releases the inverter's pulse pattern to the IGBTs. 0 = pulse inhibit / coast to stop via terminal stage.
For jog operation the typical control pattern is:
| State | Bit 0 | Bit 1 | Bit 2 | Bit 3 | Bit 8/9 | Result |
|---|---|---|---|---|---|---|
| Drive ready, not jogging | 1 | 1 | 1 | 1 | 0 | Drive at zero setpoint, enabled |
| Jog forward | 1 | 1 | 1 | 1 | 10 | Ramp to P448 |
| Jog reverse | 1 | 1 | 1 | 1 | 01 | Ramp to -P449 |
| Off (controlled) | 0 | 1 | 1 | 1 | 0 | Ramp down with P464 |
| Emergency off (coast) | X | 0 | X | X | X | Coast to stop |
| Quick stop | X | 1 | 0 | X | X | Ramp down with P466 |
Most field wiring interlock circuits use a hardware safety relay wired into the OFF2 (terminal 16) or through a STO input on a Sinamics replacement. For the Masterdrive, OFF2 through STW1 bit 1 is acceptable for SIL 1 only; for higher SIL the safety relay must break the 24 V to terminal 16.
9. Verification and Commissioning Procedure
- With drive powered but motor uncoupled, connect DriveMonitor via RS232 service port and verify firmware version (target Masterdrive VC firmware ≥ 2.4 for the B3108/B3109 binectors to be valid).
- Read P568, P569, P448, P449, P462, P463 and capture as baseline.
- From STEP 7, force STW1 = 0x04CF (binary 0000 0100 1100 1111) with HSW = 0x0000. This gives ON/OFF1 = 1, OFF2 = 1, OFF3 = 1, Inverter Enable = 1, Ramp Gen = 1, Setpoint Enable = 1. Verify ZSW1 reports
Status Word bit 2 = 1(drive enabled) andbit 6 = 1(setpoint reached). - Force STW1 with bit 8 = 1 (jog forward). Measure actual speed on r021 or via P021 display. Speed should ramp to P448.
- Release jog (bit 8 = 0). Speed should ramp to zero with P463.
- Force STW1 with bit 9 = 1 (jog reverse). Direction reverses; magnitude ramps to P449.
- Re-couple motor only after this no-load sequence is fully verified.
- Capture the parameter set with DriveMonitor's Upload menu and save to project.
10. Troubleshooting Matrix
| Symptom | Likely cause | Diagnostic | Remedy |
|---|---|---|---|
| Drive does not jog in either direction | OFF2 or OFF3 not set | Read STW1 in DriveMonitor trace | Set bits 1 and 2 high in PLC |
| Jog forward works, jog reverse does not | P449 sign wrong or P569 source wrong | Read r069 active binector | Verify P569 = B3109; set P449 negative |
| Drive jogs but at full speed | P448 / P449 = 100 % or larger than expected | Read P448 / P449 in DriveMonitor | Reduce to 5 % for commissioning |
| Drive ramps at jog but does not stop | Jog bit stays latched in PLC | Check PLC tag source (HMI) | Use pushbutton with falling edge evaluation |
| F002 fault (precharge) on power-up | DC bus not pre-charged; mains contactor timing | Check F002 detail bits in r947 | Wait for pre-charge complete; check mains contactor |
| F015 (no field) on DC Masterdrive | Field current absent | Check field supply unit; r018 field current | Verify field ON command and supply |
| Drive not visible in DriveMonitor via USS | Baud rate mismatch or wrong interface | Try 9600 / 19200 / 38400 baud | Match drive P700 / P701 to PC |
| Profibus communication fault (BF) | Slave address mismatch or GSD mismatch | Check P918 against HW Config | Re-import GSD; verify address switches |
| SFC15 returns RET_VAL = W#16#80A1 | PLC in STOP or DP master not running | Check CPU RUN state | Restart CPU; check OB82/OB86 |
| Jog setpoint ignored during normal run | Bit 10 (Control by PLC) = 0 | Trace STW1 bit 10 | Set bit 10 = 1 to give PLC authority |
11. Firmware and Compatibility Notes
- Masterdrive VC firmware versions 2.4 through 3.3x are in scope. B3108 / B3109 binector numbering is consistent across these releases.
- Masterdrive MC (Motion Control) variants use identical BICO for jog but add an additional
P568.2indexing for the second drive data set (BDS2). For twin-motor applications confirm which drive data set is currently selected in r005 / P571. - Compact PLUS units (6SE70xx-2) share the same parameter numbering.
- The 6SE70 product line has been officially phased out; replacement platform is SINAMICS G120 / S120. If you are migrating, the jog function is implemented via PROFIdrive control word bits 4 / 5 / 6 / 8 of STW1 (depending on telegram) and parameter p1058 / p1059.
12. Frequently Asked Questions
Why does my drive ignore the jog bit from the S7-400 even though STW1 bit 8 is high?
The jog bit is only honored when the rest of the enable chain is satisfied: ON/OFF1 (bit 0), OFF2 (bit 1), OFF3 (bit 2), Inverter Enable (bit 3), and Control by PLC (bit 10) must all be 1. DriveMonitor trace of STW1 in Online / Trace reveals which bit is missing.
What binector number corresponds to Profibus Control Word 1 bit 8 and bit 9 on a 6SE70?
Bit 8 is binector B3108 and bit 9 is binector B3109. These are the default source values for P568 and P569 respectively when the CBP2 board is in slot 4 of the drive.
Can I jog without the main drive enable (bit 3)?
No. Inverter Enable (bit 3) gates the IGBT pulses. Even with both jog bits set, the drive will not produce torque unless bit 3 is 1. Jog only selects the setpoint path; it does not bypass the inverter enable interlock.
Do I need SFC14 / SFC15 for jog control with PPO type 1?
For PPO type 1 (2 PZD words output, 2 PZD words input) the four-byte data block is consistent within a single STEP 7 cycle and simple Load/Transfer is sufficient. Move to SFC14/SFC15 only when you scale to PPO type 4 or 5 (10/12 bytes) or when the DP cycle time exceeds the OB1 scan.
What is the difference between jog setpoint 1 (P448) and the regular setpoint (P401)?
P401 is the main setpoint source selector (analog, fixed, motorized potentiometer, Profibus HSW). P448 is the dedicated jog setpoint, fixed in percent of P350, and is automatically active when bit 8 of STW1 is high. The drive switches between P401 and P448 internally with no ramp discontinuity.