SM 1223 6ES7223-1BL30-0XB0 Outputs Not Switching Wiring Diagnosis

Problem Overview

An SM 1223 6ES7223-1BL30-0XB0 digital input/output module is installed on a SIMATIC S7-1200 CPU and has been configured in the TIA Portal project. Inputs are mapped to I8.0 through I9.7 and outputs to Q8.0 through Q9.7. The user program, the watch table, and the online monitor all show the correct logical state transitions on the output tags. A multimeter, however, measures 0 V on every output terminal regardless of the logical state. The CPU does not report an I/O access error, the SF/DIAG LED remains off, and the input group appears to function normally.

This is a classic "logic is correct, physics is wrong" failure mode on S7-1200 signal modules. The most common root cause is a terminal-row misassignment on the 40-pin front connector, where field wiring is landed on the wrong physical row of the SM 1223 plug.

Affected Hardware Identification

The article applies to the following Siemens SIMATIC S7-1200 digital I/O module:

Refer to the official Siemens S7-1200 manual collection on TIA Portal Cloud - SM 1223 digital input/output V DC wiring diagrams for the canonical pinout.

Symptom Definition

Use this checklist to confirm you are looking at the failure mode covered in this article:

1. Logical state correct: In TIA Portal, go online and open the watch table assigned to the SM 1223 outputs. The status of Q8.0 through Q9.7 toggles as expected when the program runs.
2. No diagnostic interrupt: The module does not raise an "IO Access Error" or "Channel Fault". The diagnostic buffer of the CPU contains no entry referencing the SM 1223.
3. LEDs normal: The green PWR LED on the SM 1223 is on. The channel status LEDs (green) track the logical state of Q8.x / Q9.x.
4. Physical output stuck low: With a DMM set to V DC between the output terminal (for example Q8.0) and 1M or 2M, the reading is 0 V at all times, even when the LED for that channel is on.
5. No channel damage: Outputs are not shorted to 0 V (no tripped external fuse), and the supply at 1L / 2L is 24 V DC when measured.

If items 1-3 hold but item 4 shows 0 V and item 5 shows the supply is present, the failure is in the wiring topology, not in the module. Proceed to the next section.

Root Cause: Terminal-Row Misassignment

The SM 1223 6ES7223-1BL30-0XB0 uses a 40-pin front connector that exposes two physical rows of spring or screw terminals. The factory wire-side wiring diagram inside the door of the module numbers these rows from 1 (top) to 40 (bottom). The labels printed on the door — 1L, 1M, 2L, 2M, DIa, DIb — correspond to specific terminal numbers, not to "left" and "right".

A frequently observed wiring error is to assume that DIa is the upper row and DIb is the lower row. On this 16/16 module the assignment is the opposite: DIa is the lower row of the connector and DIb is the upper row. If the installer mirrors the row order when landing +24 V to DIa and 0 V to 1M, the supply is delivered to the wrong input group, the configured input group A is left floating, and depending on how the user has re-purposed the adjacent terminals, the output group supply rails (1L/2L) can also be left without 24 V.

Correct SM 1223 Terminal Layout

Always work from the wiring diagram on the inside of the hinged door of the module, not from a generic drawing. The two rows of the 40-pin connector are arranged as follows for the 6ES7223-1BL30-0XB0:

For the canonical pinout, refer to TIA Portal Cloud - SM 1223 digital input/output V DC wiring diagrams.

Step-by-Step Diagnostic Procedure

Follow this sequence in order. Stop as soon as the cause is identified.

1. Stop the CPU and isolate the field wiring by unplugging the 40-pin connector from the SM 1223.
2. Re-insert the connector and verify the click. A partially seated connector on a push-in model is a common cause of intermittent or missing supply to a single group.
3. Power the field side only (the CPU may stay in STOP). Measure between the connector terminal labelled 1L and the terminal labelled 1M. The reading should be 20.4 V DC to 28.8 V DC.
4. Repeat the measurement between 2L and 2M. The reading should be the same supply range.
5. If either 1L-1M or 2L-2M reads 0 V, the supply conductor is not landed on the right pin. Trace the wire back to the 24 V source.
6. With the field supply confirmed, return the CPU to RUN. Toggle a single output bit in the watch table, for example force Q8.0 := TRUE.
7. Measure the voltage at the load side of Q8.0 with respect to 1M. The expected reading is the supply voltage (less the on-state drop of the high-side switch, typically < 0.5 V at 0.5 A).

Voltage and Signal Measurements

PLC Logic vs Physical Output

The SM 1223 status LED for each output is driven from the internal shift register, not from the actual output transistor. The LED and the watch table can therefore both indicate "ON" while the high-side MOSFET remains off because of a missing L+ supply. This is the exact symptom the original incident describes: "Monitors outputs (either in the program or watch a table) also reflect logical changes to these outputs but no voltage can be measured on the output." Treat that sentence as a diagnostic marker, not a contradiction.

Output Group Power Supply Requirements

The 6ES7223-1BL30-0XB0 has two electrically isolated output groups. Each group requires its own dedicated 24 V DC supply referenced to its own M terminal:

• Group 1 (Q8.0 - Q8.7): +24 V to 1L, 0 V to 1M. Source-type outputs switch the +24 V onto the load.
• Group 2 (Q9.0 - Q9.7): +24 V to 2L, 0 V to 2M. Independent of group 1.

Total current per group: 8 x 0.5 A = 4 A maximum simultaneous. Per the S7-1200 system manual, the field-side supply must be sized for inrush (capacitive loads, lamp filaments, contactor coils). A practical rule is 1.25 x the steady-state load, in line with NEC 210.20(A) and IEC 60204-1 overcurrent protection sizing for continuous loads.

Apparent power for a single group at full load: S = V × I / 1000 = 24 V × 4 A / 1000 = 0.096 kVA (single-phase). For a 24 V DC system, real power is the same: P = 24 V × 4 A = 96 W.

Verification

After the wiring correction, run the following verification block:

1. Place the CPU in RUN. Force Q8.0 to TRUE in the watch table for 5 seconds, then FALSE for 5 seconds.
2. Measure Q8.0 to 1M with a DMM. Expect ~24 V when forced ON, 0 V when forced OFF.
3. Repeat for every output channel that is in service. Log the result.
4. Verify each input group. Apply 24 V to the first terminal of DIa and 0 V to aM. Confirm the corresponding bit (for example I8.0) goes high in the watch table.
5. Repeat for the first terminal of DIb and confirm the corresponding bit (for example I9.0) goes high.
6. Cycle power on the field supply once to confirm there is no start-up inrush issue that drops a group out.

Common Pitfalls and Field Notes

• Row order assumption. The most frequent installer error on this module. Always re-check the row labels DIa and DIb against the wiring diagram on the door before applying power.
• Connector seating. The push-in connector can appear seated when it is not fully latched. Push until the audible click, then tug gently on each wire.
• Sharing M rails. Although the two output groups are isolated, the two input groups share a common 0 V backplane internally on some firmware revisions. Do not use this to simplify the wiring without first confirming on the specific hardware version label.
• Watch-table force vs. program force. If the program is overwriting a forced bit, the watch table will not reflect the force. Use the watch table "Force" column, not just a write, when validating output hardware.
• Multimeter loading. A standard DMM has 10 MΩ input impedance. On a 0.5 A source output, the loading is negligible. If measuring a high-impedance node (a pull-up or a wet contact), use a meter with at least 10 MΩ to avoid false readings.
• Crosstalk and shared supply. If only some outputs in a group are missing 24 V, suspect a broken conductor or a loose ferrule rather than the module.

Troubleshooting Matrix

References for Verification

Use the following official Siemens resource to confirm the wiring and electrical characteristics before commissioning or rework:

• TIA Portal Cloud - SM 1223 digital input/output V DC wiring diagrams