Troubleshooting Omron CPM1 PLC No Response and ERR LED Fault

1. Problem Description and Triage

A fielded Omron CPM1-30CDR-A-V1 Programmable Controller (PC) presents a hard fault signature on the front-panel LED stack:

• PWR LED (green) ON solid
• ERR/ALM LED (red) ON solid
• RUN LED (green) OFF
• COMM LED (orange) OFF
• Host-side software (Syswin 3.4 and CX-Programmer 5.0) returns "No response from PLC" after the standard 5-10 second SYSMAC WAY handshake timeout
• Handheld Programming Console CPM1-PR001 displays a continuous line of dashes =============== with no response to any keypress
• A sibling CPM1A-20CDR-A-V1 on the same desk communicates normally with the same USB-CIF02 cable, the same software, and the same Programming Console

This combination of evidence is diagnostic and rules out the cable, the host driver, the host software, and the workstation. The target CPM1 is in a CPU-fatal state, not a configuration state. The remainder of this article walks through how to confirm that diagnosis, what failure modes produce it, the recovery sequence, and the migration options when recovery is impossible.

2. CPM1 Hardware Identification and LED Status Codes

The CPM1-30CDR-A-V1 nomenclature decodes as follows (per the CPM1 Operation Manual W262):

• CPM1 — Small PC family (legacy entry-level)
• 30 — 30 I/O points (18 inputs / 12 outputs)
• C — Built-in CPU
• D — DC input type (24 VDC, sinking)
• R — Relay output type (rated 2 A / 250 VAC, 2 A / 24 VDC)
• A — AC power supply (100-240 VAC, 50/60 Hz)
• V1 — Hardware revision 1 (added 10 kHz high-speed counter, pulse output, 2 analog setpoint inputs, expansion-capable)

The V1 suffix is important. The original non-V1 CPM1 (released ~1997) has 2.5 kHz high-speed counters; the V1 (released ~2000) raises that to 10 kHz and adds 2-point analog setting. Both revisions share the same peripheral port pinout and the same SYSMAC WAY protocol, so cables and software are interchangeable across revisions.

2.1 LED Status Matrix

The CPM1 has four indicators on the front panel. Decode any combination as follows:

In the case under analysis, PWR solid + ERR solid + RUN off + COMM off is the canonical signature of a CPU-fatal error per the W262 manual. A non-fatal alarm would not stop RUN; a memory-loss flashing PWR would not stop RUN; only a fatal error halts the CPU and lights ERR solid.

2.2 Fatal Error Code Storage (AR 1412-AR 1415)

The CPM1 stores the fatal error code in the Auxiliary Relay area, as documented in W262:

The error code cannot be retrieved here because the peripheral bus is not responding. On a healthy CPM1, the code is read with the Programming Console in MON mode: SHIFT + CHANNEL + 1412 + READ. Common fatal error codes and their trigger conditions are:

2.3 Cycle Watchdog Time (DM 6618)

The CPM1 hardware watchdog timer is set in DM 6618:

• DM 6618 = 1000 (default): 1000 ms cycle watchdog timeout
• DM 6618 = 0: watchdog disabled (use only during commissioning)
• DM 6618 = n: n × 10 ms timeout (e.g., 100 = 1000 ms; 50 = 500 ms)

A WDT timeout occurs when the scan cycle time exceeds the set value. The cycle time T_scan is:

T_scan = T_input + T_execute + T_peripheral + T_output

Where on a healthy CPM1-30CDR-A-V1 with a 1 KB program, T_scan is typically 5-15 ms. A WDT timeout at the default 1000 ms means the scan stalled for over 1 second, almost certainly due to a hardware hang (I/O bus overcurrent) or an infinite loop in the program.

3. Cable Selection: USB-CIF02 vs CQM1-CIF02 vs CS1W-CIF31

The OP reports using a cable labelled "USB-CIF02". This is not an Omron catalogue number. The genuine Omron peripheral-port cables are:

The USB-CIF02 cable mentioned in the source is a third-party clone cable that emulates CQM1-CIF02 and CS1W-CIF31 functionality in a single package. These clone cables are common in the secondary market and are documented in third-party listings as functional on CPM1A, CPM2*, CQM1, and CQM1H when the host protocol is set to peripheral bus. They are not listed in any Omron eData publication, and Omron technical support does not support them. Omron's eData library entry for the CPM1 covers only the genuine cable options (W262 manual references CQM1-CIF02 and CS1W-CIF31 explicitly).

3.1 Cable Diagnosis Logic

The OP observed that the same USB-CIF02 cable communicates with a CPM1A-20CDR-A-V1. This proves three things:

1. The cable, its driver, and its host-side protocol are functional
2. The host COM port and SYSMAC WAY settings are correct
3. The clone cable is correctly emulating the peripheral bus

The failure to communicate with the target CPM1 is therefore not a cable, driver, or host-side fault. The fault is in the PLC itself. This rules out the common error of mis-setting DM 6650 to a non-peripheral-bus protocol: if the protocol were wrong, the Programming Console (CPM1-PR001) would also fail to communicate, but the OP reports the Programming Console is in the same non-responsive state. The peripheral bus protocol is therefore intact; the CPU is simply not responding to it.

3.2 When to Try a Genuine Cable

If the OP were unable to communicate with the CPM1A on the same cable, the diagnosis would shift to the cable. In that case, swap to a genuine CS1W-CIF31 (USB) or CQM1-CIF02 (RS-232C) to isolate the variable of clone-cable compatibility. If the genuine cable fails on both CPM1 and CPM1A, the issue is the host-side driver or COM port. If the genuine cable works on CPM1A but still fails on CPM1, the issue is the PLC.

4. Peripheral Port Pinout and Host Link Defaults

The CPM1 peripheral port is a 4-pin round mini-DIN connector on the bottom face of the CPU. The pinout per the CPM1 Operation Manual W262:

The peripheral port is a 3-wire RS-232-style link (no hardware handshaking). Communication is half-duplex at 9,600 bps by default, with no parity, 1 stop bit, 7 data bits for host link, and 8-N-1 for peripheral bus. Maximum cable length is 3 m for the CQM1-CIF02 and 5 m for the CS1W-CIF31.

4.1 PLC Setup Word for Peripheral Port (DM 6650)

The peripheral port protocol is set in PLC Setup word DM 6650:

4.2 RS-232C Port (D-sub 9, 30/40-point models only)

The CPM1-30CDR-A-V1 has a second communication port: a D-sub 9 male connector on the bottom face. The pinout is standard RS-232C DTE:

This port defaults to host link at 9,600 bps, 7-E-2, unit number 00. The OP could attempt connection here as a secondary test, but on a CPU-fatal error the RS-232C port is also unresponsive because the same CPU processes both ports.

5. Software Setup: Syswin 3.4 vs CX-Programmer 5.0

Both software packages support CPM1 but with different scope:

5.1 Syswin 3.4 Connection Procedure

1. Connect cable to peripheral port or RS-232C port
2. Start Syswin → File → New Project → PLC Type: CPM1, CPU: 30CDR-A-V1
3. Online → Communications → Network Type: SYSMAC WAY
4. Set COM port, baud rate 9,600, peripheral bus
5. Click Online → Connect (Ctrl+W) — wait up to 5 seconds for the SYSMAC WAY handshake

5.2 CX-Programmer 5.0 Connection Procedure

1. Connect cable to peripheral port
2. Install cable driver (USB-CDC virtual COM port) — confirm COM number in Device Manager
3. Start CX-Programmer → New → Device Type: CPM1, CPU: 30CDR-A-V1, Network: SYSMAC WAY
4. Set COM port, baud rate 9,600, peripheral bus, unit number 00
5. Click Online → Work Online (Ctrl+W) — wait 3-5 s for the SYSMAC WAY handshake

If the host-side protocol and port parameters are correct, both packages will handshake with a healthy CPM1 within 5 seconds. The handshake consists of:

• Host sends @00TS (Host Link test command) or TEST (peripheral bus probe)
• PLC responds with unit number (00) + mode (00 = PROGRAM, 02 = MONITOR, 04 = RUN) + error code
• Round-trip time on peripheral bus: 50-200 ms

A "No response from PLC" / "No reply from CPU" timeout after 10-15 s, when the same setup works on a sibling CPM1A, confirms that the target CPU is not processing the SYSMAC WAY handshake.

6. Handheld Programmer Symptom Interpretation

The CPM1-PR001 Programming Console uses the peripheral bus protocol exclusively. Its LCD shows one of three states on power-up:

1. Peripheral bus active, CPU in STOP: dashes appear, but pressing CLR brings up the mode menu (PROGRAM / MONITOR / RUN)
2. Peripheral bus active, CPU in RUN: dashes appear, but pressing CLR brings up the I/O monitor and current values
3. Peripheral bus active, CPU in fatal error: dashes appear and do not change no matter which key is pressed. The CPU is not responding to the peripheral bus at all.

The OP reports that the CPM1-PR001 shows dashes regardless of keypress. Combined with the ERR LED on solid and PWR LED on solid, this confirms case 3: the CPU is in a fatal-error state and is not responding to the peripheral bus. The keyboard itself is functional (it works on the CPM1A), the LCD is functional (it displays), and the connector is functional (it accepts the cable). The fault is upstream — the CPU ASIC is not servicing the bus.

6.1 Why Does the CPM1A Respond Normally?

The CPM1A-20CDR-A-V1 responds normally to the same Programming Console because the CPM1A is healthy; its CPU executes the SYSMAC WAY handshake on the peripheral bus, and the Programming Console receives the ID/Unit Number/Mode response within 50 ms. The CPM1 does not respond at all because its CPU is halted by the watchdog or is in a hardware-fail state.

The same logic applies to the host software: Syswin and CX-Programmer both use the SYSMAC WAY handshake. A healthy CPU responds to both within 100-200 ms; a fatal-error CPU responds to neither. The behavior across two independent software packages and one independent handheld device, all failing on the same target PLC and succeeding on the same sibling PLC, is conclusive evidence of a PLC hardware fault.

7. Root Cause: Fatal CPU / Memory Error

The dominant root causes that produce the "PWR + ERR solid, no peripheral bus response" signature, in priority order:

7.1 Watchdog Timer (WDT) Timeout

The CPM1 has a hardware watchdog that times out if the scan does not complete within the cycle watch time. The CPU forces a fatal error and halts when the WDT times out. Typical triggers:

• I/O bus short (overcurrent on the Expansion I/O bus draws enough current to hang the CPU)
• A stuck I/O scan (e.g., a peripheral device that does not acknowledge)
• A program loop that does not complete (an infinite loop that does not call END)

7.2 I/O Bus Error

Detected by the I/O bus monitor; sets AR 1412 to 0x80E0. Triggers if:

• The Expansion I/O bus pulls excessive current (>0.5 A on the 5 VDC bus)
• An I/O unit is partially inserted
• The I/O bus cable is damaged or has a short
• The CPU is connected to a defective expansion unit (e.g., CPM1A-20EDR, CPM1A-8ED, CPM1A-TS002)

7.3 Program Memory Parity Error

SRAM read parity mismatch; sets AR 1412 to 0x80F1. Triggers on:

• Long-term memory degradation — the CPM1 uses a supercapacitor-backed SRAM rated for ~20 days of backup; units in service 10+ years can lose data and the program area can become corrupted
• Power-supply glitch that writes garbage into the program area during a brownout
• Missing END instruction — the program runs off the end of the program area and executes undefined op codes

7.4 Hardware Failure of the CPU ASIC

The most common long-term failure mode for a CPM1 in service for 10+ years. The CPU ASIC (a custom Omron gate array) develops an internal fault and no longer executes the bus handshake. Symptoms:

• All LEDs behave normally except ERR stays on
• All communication ports unresponsive
• Programming Console shows permanent dashes
• DIP memory clear has no effect

This failure is not recoverable by software or DIP-switch manipulation. The unit must be replaced.

7.5 Why the DIP Memory Clear Will Not Help in Most Cases

The DIP-switch memory clear (Switch 2 ON at power-up) clears the user program area but does not reset the CPU's hardware state. If the CPU is in a hardware-fail state, the memory clear has no effect — the CPU does not execute the boot loader. If the CPU is in a watchdog-timeout state, the memory clear may break the loop and allow the CPU to start, but this is rare in practice. The 30-second power-down hold (Step 2 below) achieves the same effect on the supercapacitor backup without requiring DIP access.

8. Step-by-Step Recovery Procedure

Before declaring the CPM1 hardware-dead, attempt the following in order. Each step assumes the previous did not recover the PLC.

Step 1: Verify Power Supply Quality

Measure AC line voltage at the CPM1 L/N terminals. Acceptable range per W262: 100-240 VAC, 50/60 Hz. If the line is below 85 VAC or above 264 VAC, the internal DC rails may drop out and reset the CPU continuously.

For the AC-input CPM1 (suffix A), the internal DC rails are 5 VDC (logic) and 24 VDC (sensor supply to the inputs, max 0.3 A). If the 24 VDC rail is shorted (e.g., by a field sensor drawing more than 0.3 A), the 5 VDC rail may droop and trigger a CPU reset. Disconnect all field wiring to isolate the PLC power section from the I/O section.

Step 2: Power Cycle With 30-Second Hold

1. Power OFF
2. Wait 30 seconds (drain internal supercapacitor memory backup — rated ~20 days at 25 °C)
3. Power ON
4. Observe PWR / ERR / RUN

If the PWR LED flashes after power-up, the supercapacitor lost backup and the program is empty. The PLC will still respond to peripheral bus (in STOP mode), and the program can be downloaded.

If the PWR LED stays solid and the ERR LED stays solid, the CPU is in a fatal state. Proceed to Step 3.

Step 3: Force Memory Clear via DIP Switch

The CPM1 (30/40-point models) has a 4-position DIP switch under the front cover:

1. Power OFF
2. Open front cover, locate DIP switch
3. Set Switch 2 to ON (other switches OFF)
4. Power ON — PWR LED should flash, ERR LED should be off, RUN LED should be off (STOP mode with cleared memory)
5. Power OFF, set Switch 2 back to OFF
6. Power ON — PWR solid, RUN off, ERR off, COMM may blink during peripheral bus activity

If the PLC responds to this procedure with PWR flashing, then ERR off, the CPU is healthy and the program was corrupt. Download the program from a backup.

If the PWR and ERR LEDs remain solid on, the CPU is hardware-faulted. Proceed to Step 4.

Step 4: Cold Test on a Bench Supply

Move the CPM1 to a known-good 100-240 VAC source with no field wiring connected. Disconnect:

• The peripheral port cable
• The RS-232C port cable (if used)
• The Expansion I/O bus cable
• All field wiring to the input terminals (00-11) and output terminals (100-107)

Power on. If the PLC still shows PWR + ERR solid, the fault is internal — the CPU ASIC, the memory, or the oscillator is dead. The unit must be replaced.

Step 5: Confirm Hardware Failure and Plan Replacement

At this point, the unit is unrecoverable. Plan a migration to a compatible replacement.

8.1 Recovery Decision Flow

9. Verification Tests

After any recovery step, verify the PLC is healthy with the following seven checks:

1. PWR LED solid (not flashing) — internal DC rails within range
2. ERR LED off — no fatal or non-fatal errors
3. RUN LED solid after CYCLE keypress on Programming Console, or after Run command from CX-Programmer — program is executing
4. COMM LED blinks when host link activity occurs — peripheral bus is alive
5. AR 1412 reads 0x0000 in MON mode — no fatal error code
6. DM 6617 (CPU error log) and DM 6618 (cycle time) show reasonable values — log is empty, cycle time is in the expected range
7. First scan time ≤ 30 ms for a 1 KB program — no scan hang

A passing cycle of these seven checks indicates the CPU is healthy and the program can be downloaded and run.

9.1 Troubleshooting Matrix

10. Migration Path: CPM1A, CP1E, CP1L Replacement

The CPM1 is end-of-life as of Omron's product life cycle. Direct replacements with minimal program changes:

For the OP, the lowest-effort migration is the CPM1A-30CDR-A-V1 — same family, same peripheral port, same instruction set, and the existing program can be transferred with CX-Programmer or Syswin without translation.

For new installations or those requiring USB, Ethernet, or Modbus-TCP, the CP1L-M30DR-A is the modern equivalent. The CP1L accepts the same I/O wiring and uses the same instruction set, with the addition of structured text, function blocks, and Ethernet on the M-series.

11. Key Programmable Areas Reference

For engineers migrating programs from a failed CPM1 to a CP1L, the memory map is preserved:

The PLC Setup area is preserved 1:1 between CPM1 and CP1L for the words used (DM 6600-DM 6655 for port setup; DM 6618 for cycle WDT). Engineers porting an existing CPM1 program do not need to modify any DM 66xx values when migrating to CP1L.

12. Field-Proven Tips and Common Pitfalls

From service experience with CPM1 units that have been in service 10-20 years:

• Supercapacitor degradation: the CPM1's supercapacitor holds program memory for ~20 days at 25 °C. Units left unpowered for more than 30 days will lose the program. The PWR LED flashes on first power-up to indicate backup loss. Always back up the program to CX-Programmer / Syswin file format .cxp or .swp before any planned power-down longer than 2 weeks.
• EMI on peripheral port: the mini-DIN connector is not shielded. In high-EMI environments (VFD cabinets, welders), the peripheral bus can drop packets and produce intermittent connection failures. Route the cable away from VFD input/output cables by at least 150 mm.
• Ground loops on the 24 VDC sensor supply: the CPM1's 24 VDC output is referenced to the AC ground through the chassis. Field sensors with their own grounded 24 VDC supply can create ground loops that cause the 24 VDC rail to drift. Use isolated sensors or a single-point ground.
• Relay contact welding: relay outputs rated 2 A can weld closed if the load exceeds 2 A, even briefly. Inspect output relay contacts if the load is inductive (solenoids, motor starters). A welded contact is not visible on the LED and can cause dangerous machine behavior.
• Last-known-good program backup: before clearing memory or replacing the PLC, always upload the program to a known-good host and save it. The CPM1 has no built-in program backup mechanism.