Troubleshooting S7-400H: STOP LED After Plant Trip Fault

David Krause17 min read
S7-400SiemensTroubleshooting
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Troubleshooting S7-400H: STOP LED After Plant Trip and Field-Side Spark Event

When an S7-400H redundant PLC pair enters a dual-STOP condition after a plant trip and a simultaneous field-side spark event, the failure path is rarely a single root cause. In most documented cases, three concurrent mechanisms combine: a transient over-voltage event on the plant distribution side, a wiring-induced surge on a 24 V I/O segment, and a residual FORCE condition that prevents one CPU from re-entering RUN after a memory reset. This article builds a field-tested diagnostic matrix, walks through the precise recovery sequence, and explains why a warm restart alone is not a sustainable fix for the standby CPU.

Field Note: A single spark observed at a limit-switch terminal is rarely the root cause. The spark is almost always a symptom of a voltage transient propagating onto the I/O cable shield, common return, or 24 V supply rail. Treat the spark as evidence, not cause, and isolate the affected I/O module before any further CPU restart attempts.

1. S7-400H Redundancy Architecture Recap

The S7-400H (S7-400H stands for "Hochverfügbar" - Highly Available) is a hot-standby redundant system built from two AS 400H stations synchronized over fiber-optic redundancy links. Understanding the master/standby behavior is essential to interpreting the LED pattern described in the original field report.

Table 1 - S7-400H roles, LED states, and what they mean
Role RUN LED STOP LED REDF (redundancy loss) IF (interface) Meaning
Master (active) ON (green) OFF OFF OFF or flashing Controlling the process; syncing with standby
Standby ON (green) OFF OFF OFF or flashing Hot-standby, fully synchronized, ready to take over
Master ON OFF ON (yellow) OFF Redundancy lost; master continues, no hot-standby backup
Standby ON OFF ON (yellow) OFF Standby has lost link to master but is still alive
Master OR Standby OFF ON (yellow) n/a n/a CPU is in STOP - program halted, outputs follow configured substitute behavior
Master OR Standby Flashing 0.5 Hz ON n/a n/a Halt or stop with diagnostic event pending; read diagnostic buffer
Master OR Standby Flashing 2 Hz ON n/a n/a CPU is requesting a memory reset (MRES) or is in the middle of one

The combination observed in the field report - both Master and Standby in STOP, then after warm restart, Master RUN and Standby STOP - is a textbook dual-CPU transient followed by a partial recovery. According to the S7-400H Fault-Tolerant Systems Manual, a simultaneous STOP on both CPUs almost always points to one of: a common-mode electrical event, an OB121/OB122 storm, a failed firmware update, or a programmed STOP issued from the engineering station.

2. Symptom Timeline Reconstruction

Breaking the field report into discrete events produces the following fault timeline, which is the framework for the rest of the diagnostic work:

  1. High-voltage transient on the plant distribution side trips the upstream breaker and de-energizes the MCC.
  2. Plant is restarted; two specific control valves no longer respond to DCS commands.
  3. Loops and cable continuity are checked on those two valves - all appear normal.
  4. When re-terminating a limit switch on one of the affected valves, a visible spark is drawn from the terminal and the entire DCS layer drops.
  5. STOP LED on both Master and Standby CPU is lit solid; RUN LED off on both.
  6. Operator performs MRES (Memory Reset) on both CPUs; both restart and DCS comes back, but the two control valves remain unoperable.
  7. Operator performs a warm restart; both control valves become operable. Master RUN LED green, Standby STOP LED yellow.
  8. Standby CPU does not auto-rejoin the redundant pair; plant runs in degraded (non-redundant) mode.

This sequence is consistent with two independent issues: (a) a corrupted output image on the SM 432 / DO module that controls the two valves, recovered by warm restart, and (b) a standby CPU that has accumulated a fault, a pending FORCE, or a redundancy-link synchronization error that MRES did not clear.

3. Root Cause Hypothesis Matrix

Table 2 - Possible root causes, evidence, and verification steps
# Hypothesis Evidence supporting it Verification step Fix
1 24 V field transient coupled into SM 432 DO module, corrupting output image for the two valves Spark at limit-switch terminal; only those two valves affected; recovered after warm restart Read diagnostic buffer for OB82 / OB122 entries with timestamp matching the spark; check SM 432 channel LEDs (SF/FS); measure 24 V on the load supply terminal of the module Replace SM 432; add surge arrestor (e.g. Phoenix Contact PT-IQ-24 or Weidmüller VPU); separate I/O cable from power cable; verify shield grounded at one end only
2 FORCE function still active on the standby CPU from a previous commissioning session Standby CPU cannot restart into RUN; MRES not performed correctly; FORCE not clearedOpen STEP 7 / TIA Portal online, Monitor/Modify, check Force column - any 'F' values indicate active forcing Remove all FORCE values, then MRES on the affected CPU
3 Redundancy link (fiber) synchronization loss REDF LED on standby; I/F LED flashing; only standby affected Check the CP 443-1 or the integrated PROFIBUS/PROFINET interface for both CPUs; verify fiber patch cables, SFP modules if used; check for bent fiber, dirty connector, or exceeded link distance Clean fiber; re-seat connectors; replace patch cord; re-download redundancy configuration
4 Common-mode voltage on the backplane / power supply PS 407 Both CPUs dropped simultaneously; field spark event Measure 24 V at PS 407 input terminals during a controlled re-energization; check input voltage window (PS 407 10A: 85-264 V AC; 24 V DC variant: 19.2-30 V) Replace PS 407 if ripple > 5 % or input outside spec; install an isolating transformer upstream
5 OB121 (programming error) or OB122 (I/O access error) storm Both CPUs stopped at the same scan Read diagnostic buffer - look for repeated OB121/OB122 calls before the STOP Patch the program to handle missing OBs; install OB121, OB122 with proper error handling
6 Stop issued from engineering station or DCS via PG/OP or S7 connection Diagnostic buffer entry 'STOP by OP' Check the diagnostic buffer for 'STOP by communication' Restrict PG/OP S7 connections; re-evaluate access rights in NetPro / HW Config
Critical: According to the S7-400H redundancy manual, a single S7-400H system must never be commissioned with FORCE active on more than one CPU. FORCE on an H system is a known contributor to "H-System switched or one CPU stop, unable to restart the stop CPU" - exactly the symptom pattern reported.

4. Memory Reset (MRES) vs Warm Restart - Operational Differences

Operators frequently confuse these two operations. In an S7-400H system, the difference determines whether a CPU can rejoin a running redundant pair or whether it is permanently excluded.

Table 3 - MRES vs warm restart on S7-400H
Aspect MRES (Memory Reset) Warm Restart (OB100)
Effect on user program Erases work memory, retains retain area only if backup battery present Re-runs OB100; non-retentive memory is cleared, retentive area preserved
Effect on outputs All outputs go to safe state until program runs Outputs remain in their last state for the duration of OB100, then re-evaluate
FORCE table FORCE values are not cleared by MRES on some firmware versions (v5.x and earlier on CPU 417-4H had this behavior) FORCE values remain active
Diagnostic buffer Preserved (buffer is battery-backed) Preserved, OB100 entry added
Redundancy behavior CPU leaves the redundant pair and must re-synchronize from the master CPU leaves the redundant pair and must re-synchronize; warm restart of a standby is supported in H systems with link-up mode
Time to recover 30-90 s depending on program size and number of S7 connections 10-30 s for typical PCS 7 projects

The Siemens S7-400 CPU manual (entry ID 1117747) documents the precise key sequence for MRES: turn the mode switch to STOP, hold the MRES button for 3 s until the STOP LED flashes slowly, release for 1 s, hold again for 3 s - the STOP LED will flash rapidly. If the operator skips the second 3 s press, the CPU performs a warm restart instead, which does not clear a stale FORCE table.

5. The FORCE Function Hazard in H Systems

FORCE is a STEP 7 / TIA Portal function that overrides process values regardless of the program logic. On a single CPU, FORCE is a commissioning convenience. On an S7-400H, FORCE is a documented hazard.

5.1 Why FORCE on an H System Causes Standby STOP

The two CPUs in an H system maintain a deterministic event-synchronous lock-step on the user program. The standby CPU mirrors the master's program execution cycle by cycle. If the master has FORCE values on a memory bit (for example, M 0.0 = TRUE) and the standby does not, the cyclic data comparison will detect a divergence and force the standby into STOP with diagnostic event "Standby CPU has different data state from master". Conversely, if FORCE was last written by an engineering station that is now connected only to the master, the standby's view of the same memory area can desynchronize.

Siemens has documented this behavior in the Siemens FAQ entry on FORCE with H-CPUs and the PCS 7 H System FAQ. The recovery procedure is: disable FORCE on both CPUs, MRES the affected CPU, and let it re-synchronize from the master.

5.2 How to Identify Active FORCE on an S7-400H

Proceed with the following steps before any other recovery action:

  1. Open STEP 7 V5.5 (or TIA Portal V16+ for newer projects) and connect online to the AS 400H station.
  2. Right-click the CPU in the project tree and select Monitor/Modify.
  3. Switch to the Force view (not the Modify view - they are different).
  4. If the table is non-empty, every row shows an 'F' status symbol. Each entry must be deleted explicitly with the trash-can icon - closing STEP 7 does not clear FORCE.
  5. Repeat for the partner CPU. Both views must be empty before MRES will result in a clean RUN.

For PCS 7 systems the equivalent path is WinCC Explorer → Tag Management → Force Values or via the CFC online test mode. The PCS 7 operator does not see a FORCE indicator on the OS by default, which is why FORCE-related faults are a frequent cause of "phantom" standby failures.

6. The Spark Event - Electrical Forensics

A spark on a limit-switch terminal during re-termination means one of three things:

  • Back-EMF from an inductive load (solenoid, contactor coil) on the same 24 V rail that is still energized elsewhere in the cabinet.
  • Stray voltage from a parallel power source - e.g. a separately powered field loop or a 4-wire device with a shared common that is not properly bonded.
  • Capacitive charge stored on a long cable that was not discharged before re-termination. A 1 km cable can store enough energy to draw a 5-10 mm spark at 24 V, and substantially more if the loop was, in fact, carrying a higher AC voltage through a fault path.

If the plant tripped on high voltage, the upstream event is almost certainly a switching over-voltage or a lightning-induced surge. The IEC 61000-4-5 surge impulse test exposes exactly this kind of failure mode: a 1 kV line-to-line and 2 kV line-to-ground impulse with 1.2/50 µs waveform. A non-protected I/O input will pass that surge directly into the SM module, which will latch the diagnostic interrupt (OB82) and, if the surge is large enough, damage the input driver stage.

Safety: Always de-energize and lock out the I/O loop supply before re-terminating a limit switch on a control valve. Use a known-good multimeter to verify zero voltage at the terminal, not just at the field device. Then discharge any cable capacitance to a known ground before stripping insulation.

7. SM 432 / Output Module Diagnostics

The two control valves that became unoperable are driven from a digital output module - typically SM 432 (in a 400H system it is more likely SM 322 in a 300-side ET 200M, but the diagnostic principles are identical). The diagnostic procedure is:

  1. Open HW Config and identify the slot and order number of the affected module (for example 6ES7 322-1BH01-0AA0).
  2. Read the diagnostic buffer in STEP 7: CPU → Module Information → Diagnostic Buffer. Filter for entries with the timestamp of the spark event.
  3. Open the module's Module InformationI/O Status and check the per-channel error byte. A '1' in bit 0 (channel fault) or bit 3 (external fault) for a particular channel confirms field-side damage.
  4. Physically inspect the module: a damaged channel will often show a darkened PCB near the output driver, a lifted SMD pad, or a ruptured TVS diode. Use a thermal camera with the module under load to find the hot channel.
  5. Measure the 24 V supply at the module's L+ terminal. If it sags below 19.2 V (the lower limit of the 24 V DC spec per IEC 61131-2), the module may have latched into a protective shutdown.

8. Step-by-Step Recovery Procedure

The following sequence is the field-tested order of operations for a S7-400H system that has been through a plant trip and a field-side electrical event.

8.1 Pre-Conditions

  • Plant is in a safe state, all valve actuators de-energized.
  • Upstream power quality is verified: voltage within 110 V AC ± 10 % (or 230 V AC ± 10 %), frequency 50/60 Hz ± 5 %.
  • Engineering station (PG) is connected to the AS 400H rack via PROFIBUS or Industrial Ethernet and STEP 7 V5.5 (or TIA Portal) is online with the project.
  • You have read-only access to the diagnostic buffer and write access to the S7 connections in NetPro.

8.2 Procedure

  1. Open the diagnostic buffer on both CPUs. Save a screenshot of the last 50 events. The first event after the trip usually tells the story.
  2. Check for active FORCE on both CPUs (Section 5.2). If FORCE is present, document each forced address, then delete all FORCE entries on both CPUs. Confirm both Force tables are empty.
  3. Read the I/O diagnostic data on the affected SM module. If a channel is permanently faulted, the module must be replaced - no amount of MRES will restore a damaged driver.
  4. Switch the Master CPU mode selector to STOP → wait 3 s → to MRES → hold 3 s → release 1 s → hold 3 s. The STOP LED will flash rapidly. The CPU will perform a full memory reset and reload from the Flash card / MMC if present.
  5. Switch the Master back to RUN. The CPU will go through OB100 (warm restart) and rejoin the H system. RUN LED should be solid green within 30 s for a typical PCS 7 project.
  6. Wait for the Standby CPU to detect the master and attempt to re-synchronize. The I/F (interface) LED on both will flash during sync, then go off when the pair is fully redundant. This is the moment of truth: if the standby's I/F LED never stops flashing, the fiber or sync error is still present.
  7. If the Standby does not rejoin: repeat step 4 on the Standby CPU. The Standby should pick up the program and data from the master via the redundancy link and rejoin in 1-3 minutes.
  8. Validate the two control valves: command them from the DCS, observe the output LED on the SM module, observe the field device. If the output LED toggles but the valve does not move, the fault is mechanical (stuck actuator, lost air supply, broken linkage), not electrical.
  9. If the output LED does not toggle, the program is not writing to that output. Inspect the CFC / SCL source for the valve block, check the interconnect, and confirm that the output address in HW Config matches the symbol used in the program.
  10. Once the system is fully redundant (Master + Standby both RUN, REDF off), perform a controlled role switch: open SIMATIC Manager → H System → Switch master/standby. The previously standby CPU should take over as master and the original master should drop to standby. This validates the redundancy in both directions.

9. Verification Matrix

Table 4 - Post-recovery verification checklist
Check Expected state How to verify
Master CPU RUN LED Solid green Visual on CPU front panel
Standby CPU RUN LED Solid green Visual on CPU front panel
REDF on both Off Visual on CPU front panel
Diagnostic buffer clean No new events for 10 min STEP 7 → Module Information → Diagnostic Buffer
FORCE table empty Both CPUs, no 'F' values STEP 7 → Monitor/Modify → Force view
Redundancy role switch Both directions succeed in < 500 ms SIMATIC Manager → H System → Switch master/standby
Valve response time < 2 s for command-to-position-feedback round trip DCS trend recording
I/O module diagnostic No channel faults, all 'OK' status STEP 7 → Module Information → I/O Status
Power supply ripple < 200 mV peak-to-peak on 24 V DC Oscilloscope at PS 407 output

10. Permanent Mitigation - Engineering Recommendations

After recovery, the following changes should be applied to prevent recurrence:

  1. Install surge protection on every I/O cable that leaves the cabinet. For 24 V DC digital signals, a Phoenix Contact PT-IQ-24 or Weidmüller VPU I 24 is appropriate. For analog signals (4-20 mA), use a Pt-IQ-4-20MA or equivalent. Both terminate the line and provide a status contact for remote monitoring.
  2. Verify shield bonding on every I/O cable. The standard rule for S7-400 cabinets is single-ended grounding - ground the shield at the cabinet entry only, leave the field end floating. Use EMC cable glands (e.g. Lapp Skintop MS-SC) to bond the shield 360° at the entry plate.
  3. Add a separate 24 V DC distribution rail for the I/O field side, with its own circuit breaker and a Phoenix Contact QUINT UPS or SITOP selectivity module to decouple field transients from the PS 407.
  4. Review the PCS 7 / STEP 7 program for missing OBs. At a minimum, OB82 (diagnostic interrupt), OB83 (insert/remove), OB121 (programming error), and OB122 (I/O access error) should be present in the offline program and have a defined behavior (typically a counter increment and a latched alarm). Without OB82, a single module diagnostic event can drop the CPU into STOP.
  5. Document a plant-wide FORCE policy. FORCE should be allowed only during commissioning, only with a signed permit, and the FORCE table must be cleared as a mandatory step in the handover procedure. PCS 7 V9 SP3+ supports a FORCE permission bit that can be tied to a user role in WinCC.
  6. Perform a controlled role switch of the H system once per quarter, ideally during a planned downtime. A H system that has not role-switched in two years is a H system with an unverified redundancy.

11. FAQ - Frequently Asked Questions

Why does one CPU show RUN and the other STOP in a normal S7-400H system?

In a redundant S7-400H pair, exactly one CPU is the master (RUN, controlling outputs) and the other is the standby (RUN, mirrored, ready to take over). Both should show green RUN. If you see one RUN and one STOP, the standby has dropped out of the redundant pair - the H system is in degraded mode and a single CPU failure will now stop the plant. Investigate the diagnostic buffer, check the redundancy link, and verify the standby has a valid program.

Is a memory reset (MRES) the same as a warm restart on an S7-400H?

No. MRES erases work memory and reloads the program from flash; a warm restart re-initializes non-retentive areas and runs OB100 without reloading the program. MRES is the only operation that fully clears a corrupted program state. On some firmware versions, MRES does not clear active FORCE - you must remove FORCE values explicitly through STEP 7 before MRES.

Why does a spark on a field terminal stop the entire DCS?

A spark indicates a field-side over-voltage or a back-EMF event that couples onto the I/O cable shield and into the SM module. The module raises a diagnostic interrupt; if OB82 is missing, the CPU executes its configured fallback - which for a default S7-400 is STOP. Both the master and the standby in a 400H pair execute the same code, so both stop simultaneously.

How do I clear active FORCE on an S7-400H from STEP 7?

Open the project online, right-click the CPU, select Monitor/Modify, switch to the Force view (not the Modify view), and delete each 'F' row. Close the dialog. Repeat for the partner CPU. Both FORCE tables must be empty. If FORCE was set from a CFC chart, the chart must be recompiled and downloaded to remove the underlying block forcing.

How can I tell whether the standby CPU has a hardware fault or just a sync loss?

Read the standby CPU's diagnostic buffer. A sync loss shows entries like 'Standby CPU has lost the link to the master' (event ID 0x4E48 or similar, depending on firmware). A hardware fault shows a module diagnostic interrupt, a memory error, or a CPU self-test failure (event ID range 0x4xxx for CPU-internal errors). A sync loss can usually be cleared by MRES; a hardware fault requires physical intervention (replace the CPU, the PS 407, or the fiber module).

What is the correct sequence to bring a tripped S7-400H back online?

De-energize and lock out the field, verify the I/O module is undamaged, clear all FORCE values, MRES the master, switch master to RUN, wait for standby to rejoin via the redundancy link, verify REDF is off, perform a role switch, then re-energize the field. Skipping the FORCE-clear step is the most common reason the standby will not rejoin.

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