Troubleshooting Siemens Masterdrives F006 Overvoltage on 6SE70

Fault Profile: F006 on 6SE7037-0TJ70

The SIMOVERT MASTERDRIVES (VC) compact drive 6SE7037-0TJ70 is a 400 V class three-phase transistor inverter in the 6SE70 family. During normal operation with a 400 V AC line (and the rectifier pre-charge complete) the DC link idles near:

U_dc_nom = √2 · V_LL · 1.35/√3 ≈ 540 V (no-load peak ≈ 565 V; loaded ≈ 540–550 V)

The reported anomaly shows the DC link voltage rising from ~540 V to ~780–800 V and decaying within 20–24 ms, then re-triggering F006 (DC link overvoltage). Because a real 250–260 V overshoot of a 540 V bulk capacitor cannot re-stabilize in tens of milliseconds through normal regen, braking resistor, or line paths, the waveform itself is the first diagnostic.

F006 Trigger Conditions and Threshold Map

On the 6SE70 family F006 is defined as "Ud > Ud_max trigger threshold". The trip is a hardware-assisted (PEU) and firmware (CUPM) gated event. Indicative thresholds for the 400 V class are:

The Impossibility Test — Why 20–24 ms Spikes Are Not Real

A genuine DC link overvoltage has a finite decay constant set by the bulk capacitance C_dc and the parallel discharge paths (regen resistor, line rectifier commutation, motor back-EMF through diodes). For the 6SE7037-0TJ70 the DC link capacitor bank is approximately:

C_dc ≈ 2200–3300 µF (effective)
R_path (regen chopper ON) ≈ 4–10 Ω
τ = R · C ≈ 10 ms to 33 ms

But the rising edge at the start of the spike is the controlling constraint. To slew the DC bus from 540 V to 800 V (Δ = 260 V) in t ≈ 20 ms through the inverter, the IGBTs would have to source:

I = C · dU/dt = (3000 µF · 260 V) / 0.020 s ≈ 39 A peak

That is plausible only if regen energy was being pushed back into the bus by a synchronous machine, by a braking action, or by a high-rate motor collapse. None of those existed in the reported operating state. Therefore the waveform is either:

1. An analog measurement artifact from the IVI board losing DC link sensing (Voltage Interface / Isolated Voltage Interface), typically caused by optocoupler failure, divider resistor drift, or a stuck multiplexer on r029.
2. A spurious gate-fire pattern from the IGD / IGBT stack where one half of the inverter momentarily freewheels energy back into the bus from the motor inductance, which then collapses as the IGBTs fail / desaturate.
3. A noise-induced over-reading on the CUPM ADC via the backplane ribbon / noisy gate drive area when the inverter is firing at high dV/dt.

Marking each candidate as either "fast rise, fast decay possible" or "fast rise, slow decay required":

This "impossibility test" is what flagged the IGBTs as the prime suspect. Static diode-check passed; dynamic behavior did not.

Affected Drive Model: 6SE7037-0TJ70 Hardware Stack

Understand the modular layout before turning screws. The 6SE70 compact series stacks the following plug-in PCBs above the power block, each with a defined isolation and signal function:

Replace in this troubleshooting order: sensing before logic before power. Skipping the IGBT step until gate drives are known good is normal practice, but in the reported case every card above the IGBTs was already swapped with no change — and the adjacent drive on the same DC link was stable. That isolates the failure into the drive's own power or sensing path that the swap did not cover, namely the IGBT modules.

Initial Diagnostic — Static Tests You Must Run Before Suspecting the IGBTs

2.1 Motor and Cable Insulation

1. Isolate the drive from line and motor. Wait 5 minutes for DC link to discharge below 50 V (verify with a measurement instrument rated to 1000 V DC).
2. Perform a 1000 V megger test phase-to-phase and phase-to-ground on the motor feeder. Acceptable reading > 100 MΩ.
3. Swap motor (or terminate cable at the motor end with a known-good spare motor) and run the drive. If the fault walks with the drive, the motor and feeder are exonerated.

2.2 Diode Check on the IGBT Modules

With the drive discharged and isolated, perform diode-mode checks on each IGBT using a Fluke 87V (or equivalent) on the diode setting:

Passing every reading only proves the device is intact at zero V, zero I, and room temperature. It does not exclude intermittent breakdown at high dV/dt or thermal load — the precise failure mode of the field incident.

2.3 Simovert Masterdrives Test Box

The Siemens Masterdrives service test box (a.k.a. DriveMonitor Service Tool) interrogates the power stack and applies a known inverter sequence to confirm gate-drive liveness. If the test passes, the gate driver ribbon, isolation transformers, and IGD are known good. Note that the service test is static-gate, not dynamic-power — it cannot induce desat conditions at the IGBTs.

Why IGBTs Pass Static Tests but Fail at Load

The decay time of the fault (≈12 ms back to 540 V from 800 V) is the smoking gun. Once an IGBT breaks down during switching, the inductor (motor + cable) dumps stored energy through the failing IGBT body diode into the DC link. That energy is on the order of:

E_bump = ½ · L_σ · I²

where L_σ is the leakage inductance of cable + motor (~ 100–300 µH for a typical installation, longer for a 20–50 m feeder) and I is the running phase current. For 75 A and 200 µH:

E_bump = 0.5 · 200 µH · (75 A)² ≈ 0.56 J per bump

Recomputed as a bus delta assuming C = 3000 µF:

ΔU = √ (U₀² + 2 E / C) − U₀ ≈ 19 V

If three such bumps occur back-to-back through gated DC link increase (each an order of magnitude higher than 19 V, hence the assumption is conservative), the decay constant through the failing device path still works out near the observed 20 ms. In other words: with one or more IGBTs momentarily shorting during switching, the DC bus can round-trip energy fast enough to fake a 540 → 800 → 540 V excursion.

Three concurrent things happen:

1. IGBT saturates → voltage collapses across the device.
2. Phase current pumps into the bus through the freewheel action of the other modules.
3. Thermal stress escalates — at the next cycle, the IGBT is more likely to fail.

Adjacent-Drive Comparison Method

The strongest diagnostic in this incident was the second drive on the same DC link: same power block, same DC bus, same load family, but no F006. That argument isolates the variable to one drive, not the bus. Repeat the experiment in the field as follows:

1. Capture the failing drive r029 (DC link voltage) trace and a Masterdrives trend at 50 ms resolution over 30 s. DriveMonitor or USS/Profibus trace both work.
2. Capture an identical trend on the healthy drive on the same bus.
3. If only one drive shows the rising-then-falling excursion, the fault is internal to that drive. Move directly to the power stack.
4. If both drives show excursions, the fault is shared: look upstream (rectifier, line, transformer, supply regulation).

Firmware V2.2 → V2.4 Implications

On the 6SE70 platform, the CUPM firmware build strongly influences trip envelope, debounce, and recovery. CUPM V2.2 → V2.4 notes known from Siemens Service release advisories:

• Tightening of F006 / F007 trip timing; shorter debounce window may bring on faults that V2.2 silently masked.
• R029 gain recalibration — a small percentage-scale change, can expose marginal IVI hardware.
• Pulse-pattern changes for the active IGBT firing pattern around ramp hold / dI/dt events.

After the firmware upgrade, recheck F006 / F007 parameters and confirm r029 calibrates against a measured external Ud. If calibration is off by > 2 % after upgrade, the IVI is suspect before you suspect the IGBTs.

Line Reactor and Ramp Adjustments — What Does and Does Not Help

The follow-up suggestion to "add a 40 Ω reactor" is a unit error. A line (commutation) reactor is specified in mH, not Ω. Typical Masterdrives line reactors for the 6SE7037 frame are 0.4–1.2 mH, which at 50/60 Hz corresponds to roughly 0.13–0.45 Ω (3 × higher than the equivalent single-phase reading, due to three-phase topology). Verify exact values via the original ordering data or the Siemens catalog under "Masterdrives line reactors" (e.g., 6SE70 series 400 V/75 A reactors from the catalog).

If the fault is confirmed to be a DC-link resonant spike (not a measurement glitch), additional inductance will damp it. If it is a measurement artifact or an IGBT breakdown, a reactor masks nothing.

For ramp adjustments P462 (acceleration) and P464 (deceleration):

• Increasing P464 (longer decel) reduces regen energy into the DC bus, useful only when the root cause is real regen.
• For spurious F006 caused by IGBT breakdown, longer ramps deliver more switching cycles during which the IGBT may fail.

Step-by-Step Root-Cause Methodology for F006 on 6SE70

1. Confirm F006 trip envelope — read r029 and r030 in the fault log; note peak Ud.
2. Capture the DC link trend via DriveMonitor or trace r029 at 10 ms sampling for at least 10 s.
3. Megger motor and feeder (phase-phase, phase-ground, all combinations).
4. Swap motor (or test with a known-good motor). If fault tracks the drive → not the motor.
5. Inspect the IGBTs using diode-mode multimeter. If any reading is suspicious → replace module.
6. Service-test with the Masterdrives test box. If passes → IGD and gate path known good.
7. Pull the IVI board, inspect for capacitor bulging, solder cracks near high-voltage divider. If marginal → replace.
8. Reconfirm CUPM firmware version is on the latest supported build; upgrade if behind.
9. Compare with adjacent drive on shared DC bus — if symmetric behavior, look at bus, not single drive.
10. If all above exonerate power stack, control boards, and firmware → replace the IGBT modules as the final suspect. Use matched thermal pads and torque to OEM specification (typically 5–8 N·m for M5/M6 mounting screws on a 6SE70 IGBT module).
11. Re-commission with r029 live trace and observe for 30 minutes at 0 / 50 / 100 % speed steps.
12. Acceptance: no excursions above ~610 V on r029 with 400 V line loaded to nameplate; F006 absent from fault log.

Verification — How to Confirm a Real Fix

After replacing the IGBT modules and re-energizing, do not rely on a single no-load run. Run the drive in this profile:

1. Steady-state at 0 %, 25 %, 50 %, 75 %, 100 % speed and nameplate load, 10 minutes each. Capture r029 trend on each step.
2. Step load: apply 0 → 100 % load step at 1500 rpm twice. Confirm r029 transient under 630 V; decays to 540 V within 2 s.
3. Accel/decel: 0 to max-speed-rev-up under load, then decel. Confirm no F006.
4. Overload pulse: 150 % rated for 60 s followed by coast-down.
5. Record full fault log dump. No F006 acceptance.

Additionally, validate thermal performance:

• Heatsink temperature rise < 40 K above ambient.
• IGBT junction temperature plateau < 110 °C (use IR/thermocouple on heatsink and reference per the IGBT datasheet curve).

Inline SVG — Recovered Failure Waveform (Conceptual)

Visual reference: three transient excursions above 760 V in the order of 20 ms each, settling back to 540 V before the next, ending in a fourth that latches F006. Such a train of fast-rise/fast-decay bumps is the signature of a power-stack failure (defective IGBTs) rather than regen energy.

Troubleshooting Matrix (Cause → Indicator → Action)

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