Brushed DC Motor PWM Speed Control: Siemens PLC + KB Drive Setup

Overview

A 0.5 HP, 110 V permanent-magnet brushed DC (PMDC) motor sourced from a Rotomag vibration-demonstration rig can be regulated to a target RPM by combining a Siemens S7-1200 (CPU 1215C + SM 1232 AQ 4x14 bit) with an off-the-shelf analog-input DC drive such as those in the KB Electronics fractional-HP family. This reference walks an automation engineer through the full architecture: PWM vs SCR topology selection, mains-to-armature voltage matching (230 V AC → 90 VDC or 180 VDC), S7-1200 analog output wiring, tachometer vs single-index-pulse feedback trade-offs, PID loop timing budget, and a commissioning checklist. The article also corrects a common misconception that the PLC itself can pulse-width modulate the armature current of a fractional-horsepower motor, and shows why the inner current loop must live in the drive while the PLC implements only the outer speed loop.

Why Direct PLC PWM Output Cannot Drive a Fractional-Horsepower Motor

The Siemens S7-1200 PWM generators (configured on outputs Qa.0–Qa.3 through the PTO/PWM block in TIA Portal) are logic-level signals intended for solid-state relays, indicators, or low-current semiconductor gate driving. They do not include gate drivers, freewheeling protection, current sensing, or armature isolation. Driving a 110 V, 0.5 HP PMDC armature directly from these outputs fails for three compounding reasons:

• Voltage rating: S7-1200 logic outputs switch 24 V DC at ≤ 0.5 A source/sink. The motor armature requires 90 V DC or 180 V DC at roughly 4 A continuous with 10–30 A inrush under load steps.
• Switching losses and inductive kickback: IGBTs sized for 24 V cannot commute the inductive flyback of a DC armature (L/dt expressed in kV/µs). Without a flyback diode and snubber the output transistor self-destructs within a few switching cycles.
• Current-loop bandwidth: A DC drive must regulate armature current at 0.5–4 kHz bandwidth to keep torque ripple low and I²R losses low. The S7-1200 OB1 scan cycle (typically 1–10 ms, even on a 1215C) is two decades too slow to close that inner loop.

ST Microelectronics application note AN414 (Controlling a Brushed DC Motor with an ST6265C or ST6260C MCU) describes the duty-cycle-to-speed relationship V_motor ≈ V_supply × D for low-voltage brushed motors (typically < 24 V) and lists safe PWM frequencies (a few kHz for small motors). It explicitly does not address mains-powered fractional-HP drives because the commutation topology, gate drive, and isolation requirements change fundamentally above ~50 V.

PWM vs SCR Phase Control: Selecting the Right Drive Topology

Two legacy topologies are used in commercial DC drives for fractional-HP PMDC motors.

PWM drives have higher efficiency and lower torque ripple at low speed because the DC link stays fully charged and the chopper regulates the average armature voltage. SCR drives waste reactive power when the firing angle is deep, produce significant audible 50/60 Hz buzz at low speed, and are the historical choice when the budget is tight and the motor runs near rated speed. For a vibration-demonstration rig where the motor is deliberately run well below rated speed, a PWM drive is the better choice.

Voltage Matching: 230 V AC Mains to 110 V PMDC Armature

The Rotomag motor is rated for 110 V DC at the armature (it belongs to the "130 V class" of PMDC motors intended for operation from 120 V AC mains through an SCR drive). With a 230 V AC supply, three architectures are possible:

1. Drive with 230 V input, 180 VDC output: The motor runs at ~60 % of rated flux; it will not reach rated speed but torque is preserved. Acceptable for this rig because the operator runs at half the motor's rated speed.
2. Drive with 230 V input, 90 VDC output (transformerless): A few KB PWM/SCR drives accept 230 VAC and produce 90 VDC for a 90 V motor. Do not connect a 110 V motor here—the undervoltage will saturate the chopper and the motor will stall under load.
3. 230 V → 115 V autotransformer feeding a 115 V-input drive producing 90 VDC: Most flexible, supports swapping in motors from other machines. Adds a UL 508A-rated transformer and panel real estate.
4. Direct Variac-plus-bridge approach (not recommended): A lab Variac feeding a full-wave bridge will run the motor open-loop. There is no current limit, no inrush control, and no speed regulation. Useful only for a one-time smoke test.

For the 110 V Rotomag motor at half-speed operation, option 1 (230 V input, 180 VDC output, drive Max Speed trimmed to 50 %) is the lowest-cost path. Confirm the drive manual lists 230 VAC input and a 180 VDC motor output option before wiring.

Siemens S7-1200 PWM Output and Analog Output Configuration

The S7-1200 CPU integrates two PWM generators per Q-byte on outputs Qa.0–Qa.3 when the PTO/PWM block is enabled in the device configuration (TIA Portal → Device → Properties → Pulse generators). Each PWM channel accepts the parameters below.

For a DC drive that expects a speed reference, the S7-1200 analog output (AQ) module is the correct interface. The SM 1232 AQ 4x14 bit (catalog number 6ES7232-4HD32-0XB0) outputs ±10 V, 0–10 V, 0–20 mA, or 4–20 mA at 14-bit resolution with 0.6 ms settling time. Configure channel 0 for 0–10 V and scale the output word QW80 so 100 % setpoint = 10 V = 100 % drive reference.

// TIA Portal SCL — speed reference scaling
// Inputs:  iSetpointRPM : INT (0..2000)
//          iMaxRPM      : INT
// Output:  qDriveRef    : WORD (0..27648 mapped to AQ0)
FUNCTION "DriveRefScale" : Void
VAR_INPUT
    iSetpointRPM : INT;
    iMaxRPM      : INT;
END_VAR
VAR_OUTPUT
    qDriveRef    : WORD;
END_VAR
VAR_TEMP
    rScale : REAL;
END_VAR
BEGIN
    rScale := INT_TO_REAL(iSetpointRPM) / INT_TO_REAL(iMaxRPM);
    IF rScale < 0.0 THEN rScale := 0.0; END_IF;
    IF rScale > 1.0 THEN rScale := 1.0; END_IF;
    qDriveRef := REAL_TO_INT(rScale * 27648.0);
END_FUNCTION

For an S7-1500 (e.g. CPU 1516-3 PN/DP), the equivalent module is the AQ 8xU/I HS (6ES7532-5HF00-0AB0) with 16-bit resolution. The same scaling constant applies because Siemens analog outputs are normalised to 27648 counts at the full configured range.

Drive Selection: KB Electronics PWM DC Drive

KB Electronics produces a fractional-HP DC drive family covering PMDC motors from 90 VDC to 180 VDC. Typical specifications for a sub-$200 unit in this line:

Before installing, post the catalog number to confirm two facts: (1) isolated analog input, (2) 230 VAC input with 90 VDC and/or 180 VDC armature output that matches the 110 V motor class. Driving a 110 V PMDC at 180 VDC is electrically permissible (motor is rated 130 V class) but mechanically over-speeds the shaft unless Max Speed is trimmed. Trim it to the design RPM before attaching any load.

Wiring Architecture: PLC Analog Out → Drive → Motor

The wiring diagram below shows the reference and feedback path. The PLC's analog output carries the speed setpoint; the drive closes the inner armature current loop at its own kHz bandwidth; an external pulse sensor (index pulse or tacho) provides speed feedback to the PLC for the outer PID loop. A 24 VDC power supply feeds the PLC, the AQ module, and the auxiliary relays; the drive itself is fed from the AC mains through a dedicated branch circuit.

Wire the PLC side with shielded twisted pair: S (shield) bonded at the PLC end only, + at the AQ module's VOUT terminal, − at the analog common terminal. Run the 24 V DC supply through a regulated SITOP-style PSU (e.g. 6EP1334-3BA10) sized 2x the AQ module load.

Speed Feedback Options: Tachometer, Encoder, or Single Index Pulse

Speed feedback enters the PLC through a digital input (DI) wired to a high-speed counter (HSC). Three options trade off resolution, hardware cost, and mounting complexity:

The error for the single-index-pulse—the discussion's original concept—is calculated from the PLC clock resolution and the inter-pulse period. At max RPM N (rev/min) and HSC clock tclk, the relative error is:

f_pulse  = N / 60         [Hz]
T_pulse  = 60 / N         [s]
error_pct = 100 * (t_clk / T_pulse) = 100 * t_clk * N / 60

For a 1 ms HSC clock and 1750 RPM motor:

f_pulse  = 1750 / 60        = 29.17 Hz
T_pulse  = 60 / 1750        = 34.29 ms
error    = 100 * 0.001 / 0.0343 = 2.92 %  (~ 51 RPM at 1750 RPM)

If the single pulse is replaced with an encoder at 1000 PPR:

f_pulse  = 1750 * 1000 / 60 = 29166 Hz
T_pulse  = 1 / 29166        = 0.0343 ms
error    = 100 * 0.001 / 0.0000343 = 2916 %  (clock no longer the limit)
// Practical resolution now limited by HSC time-base @ 1 MHz (S7-1200) = < 0.1 RPM

Where space allows, add an encoder. The 1 PPR index pulse is only acceptable when the speed is set once and not varying rapidly—PID_Compact will hunt on the 51 RPM quantization noise.

PID Loop Tuning in TIA Portal for Speed Regulation

The S7-1200 PID_Compact block (Technology Object → PID_Compact) implements a PID controller with built-in auto-tuning. Configure it as follows.

Use Ziegler-Nichols closed-loop tuning only as a starting point:

• Set Ti = 10000 s and Td = 0 (pure proportional).
• Raise Kp until the loop oscillates with constant amplitude; record K_u (ultimate gain) and T_u (oscillation period).
• Initial settings: Kp = 0.6 K_u, Ti = 0.5 T_u, Td = 0.125 T_u.
• Refine by halving Ti until overshoot stays below 5 % on a step-change in setpoint.

Loop Timing and Resolution Analysis

A DC motor drive closes two nested loops:

1. Armature current loop: bandwidth 500 Hz–4 kHz, lives in the KB drive. Not accessible to the PLC.
2. Speed loop: bandwidth 5–20 Hz, lives in the PLC PID_Compact.

The S7-1200 OB1 default scan of 1–3 ms (with HMI comms and 16 DI modules) is comfortably faster than the 10 Hz outer speed loop. The HSC runs at its configuration rate (up to 1 MHz on DIa.0–DIa.5) independently and produces an updated count every period. The PID loop executes from a cyclic interrupt OB (OB30) at 100 ms so its work is decoupled from OB1 scan jitter.

PWM Switching Frequency and DC Link Considerations

The KB PWM drive chops the rectified 230 V AC bus at a fixed 16–24 kHz. The DC link capacitance holds the ripple; minimum capacitance scales with motor current C_min ≈ I_arm / (2 × f_line × V_ripple). With I_arm = 5 A, line = 50 Hz, and a 10 V ripple budget, that is roughly C_min = 5 / (2 × 50 × 10) = 5000 µF. Production drives use 6800–10000 µF aluminium electrolytics plus a 100 nF X2 Y-cap across the AC line for EMI.

Raising the PWM frequency lowers armature current ripple and acoustic noise but increases switching loss. For fractional-HP drives, 16 kHz sits at the boundary where audio noise starts to fade out of the human hearing range; 20–24 kHz is fully silent. Confirm the catalog number uses an ultrasonic switching frequency before installing near a classroom.

Safety, Lockout, and Earth Bonding

A DC drive with a 230 VAC mains input and a 90/180 VDC armature is both a line-voltage and a stored-energy hazard. Apply these controls before commissioning:

• Lockout-tag the AC branch circuit breaker. Verify zero AC potential at the drive terminals with a Fluke 87V or equivalent before touching anything.
• Wait 5 minutes after AC removal before opening the case; the DC link capacitor retains up to 325 VDC (√2 × 230 V) and can deliver a lethal shock for several minutes.
• Bond the motor frame and the drive chassis to the panel PE lug using 6 mm² (10 AWG) stranded equipment-ground conductors. PMDC motor cases are isolated from the winding; without the bond, a winding-to-case short energises the motor case.
• Install an AC-side line filter to keep switching-frequency noise from coupling into the PLC analog module's common mode.
• Place a saddle clamp or ferrite on the analog output cable at the PLC end to keep the PWM carrier from radiating as common-mode into the 24 V supply.

Step-by-Step Commissioning Procedure

1. Verify the motor nameplate: armature V, rated current, base RPM, and field wiring for PMDC.
2. Configure the drive in current-limit (torque-foldback) mode before coupling the load. Drive the motor unloaded and confirm that zero reference = 0 VDC, half reference = half of the selected armature voltage.
3. Set Min Speed to zero and Max Speed to 50 % of the drive rating. With this rig the motor runs at half-rated speed only, so set the drive jumpers to 180 VDC output if the motor is 110 VDC type, accepting the small undervoltage, or use an autotransformer-fed 115 V drive producing 90 VDC.
4. Wire SM 1232 AQ0 [+] to drive analog input [A+] and drive [M-] to PLC analog common (M). Verify channel configuration in TIA Portal: 0–10 V, output enabled.
5. Configure HSC input on DIa.0. Set the input filter to 0.8 µs for HSC use. Map ID1000 (HSC count) to the PID input via a scaling FC that converts HSC period to RPM.
6. Program PID_Compact in TIA Portal with parameters in the table above. Use a low Kp first, then increase.
7. Place a momentary stop on the line; verify that the AC contactor or drive inhibit drops the speed reference to zero within the configured decel ramp.
8. Run the loop closed. Watch for oscillation or hunting; halve Kp or double Ti if the loop is unstable.
9. Couple the load. Verify speed regulation under step load changes (±10 % RPM is acceptable for PMDC with armature voltage feedback and a 1000 PPR encoder).

Troubleshooting Matrix

Specifications Reference

External References

The general duty-cycle-to-motor-speed equation for low-voltage brushed DC motors, ω ∝ D × V_supply, is documented in ST Microelectronics application note AN414 (Controlling a Brushed DC Motor with an ST6265C or ST6260C MCU). For low-power brushed DC control above 24 V at milliamp control currents, industrial-grade PWM motor controllers such as the RioRand 12–40 V 10 A PWM Brushed Motor Speed Controller (RioRand PWM DC Motor Speed Controller) demonstrate the same topology scaled down. These cannot replace the KB drive for a 230 VAC mains input and a 110 V armature because their voltage rating and protection architecture are designed for battery-powered applications.

FAQ