Overview: S7-300 Compact CPUs and Integrated Counting Functions
Siemens SIMATIC S7-300 compact CPUs (CPU 31xC and the legacy CPU 314 IFM) integrate technology functions inside the central processing unit. Unlike modular PLCs that require Function Modules (e.g. FM 350-1, FM 450, ET 200S 1COUNT) to be plugged into the backplane, compact CPUs include high-speed digital I/O, analog channels, and counter logic inside the CPU module. The technology functions are accessed through dedicated system function blocks (SFBs) that map onto the CPU's internal technology objects.
The most common application of those integrated counters — and the central question that opens this article — is reading pulse-train feedback from a 24 V or 5 V incremental encoder fitted to an AC motor. The compact CPU can deliver an encoder pulse count, derive motor speed, drive a comparator-based trip output, and emit pulse-width modulated control signals for downstream drives, all without an external counter module.
Two system function blocks are relevant when the encoder feedback has to land in the S7 program:
- SFB 47 (COUNT) — used on the current CPU 31xC family (314C-2 DP, 314C-2 PtP, 314C-2 PN/DP), the IM 151-7 CPU, and the ET 200S 1COUNT terminal.
- SFB 29 (COUNT) — used on the legacy CPU 314 IFM only.
The remainder of this reference explains the distinction, walks through the HW Config and wiring of the 314C-2 DP, shows concrete Ladder / FBD / Structured Text calls for SFB 47, and provides a migration path for projects that still call SFB 29 on the discontinued CPU. Source for the block interface descriptions: the Siemens CPU 31xC Technological Functions manual and the Siemens CPU 314 IFM operating manual. The symbolic and numerical naming convention for SFB 47 (block number 47, name "COUNT") and the wider S7-300/S7-400 instruction set is documented in the Siemens TIA documentation portal.
SFB 47 vs SFB 29: Functional Comparison
| Property | SFB 47 (COUNT) | SFB 29 (COUNT) |
|---|---|---|
| Target CPU | CPU 31xC family and ET 200S 1COUNT | CPU 314 IFM only |
| MLFB of target CPU (example) | CPU 314C-2 DP: 6ES7314-6CH04-0AB0 | CPU 314 IFM: 6ES7314-5AE10-0AB0 |
| Lifecycle | Active product line; firmware updates still issued | Cancelled 2003; discontinued 2012; no spare parts |
| Channels per CPU | Up to 4 (CH0..CH3) on 314C-2 DP | One on-board channel per CPU |
| Channel selection | CHANNEL input (0..n-1) | Hard-coded inside the block |
| Maximum count frequency (24 V) | 60 kHz | 10 kHz |
| Maximum count frequency (5 V TTL/RS422) | 200 kHz (when differential path is configured) | Not supported as a dedicated differential path |
| Counter modes | Continuous, single, periodic, frequency, PWM | Continuous, single, periodic |
| Software gate | SW_GATE input (AND-combined with HW gate) | HW gate only |
| Comparator + hysteresis | Yes; per channel; optionally interrupted | Single threshold; no per-channel hysteresis |
| Status structure | STATUS_H + STATUS_L split | STATUS_H + STATUS_L split |
| Job interface | JOB_REQ + JOB_ID (1..7) + JOB_VAL | JOB_REQ + JOB_ID (1..7) + JOB_VAL (same range) |
| PWM support | Yes (channel mode = PWM) | No |
| Frequency measurement | Yes (channel mode = frequency) | Yes but with slower update |
| Documentation reference | Siemens manual CPU 31xC Technological Functions | Siemens manual CPU 314 IFM operating manual |
The decisive difference is not the interface but the platform viability. The CPU 314 IFM was flagged as "cancelled" in 2003 and removed from production in 2012; no firmware updates and no spare parts have been issued since. Every new encoder-pulse-counting project, every spare-part replacement, and every engineering service request should therefore default to the 314C-2 DP with SFB 47. SFB 29 is included here only to ease migration of legacy code.
CPU 314C-2 DP vs CPU 314 IFM: Hardware Comparison
| Property | CPU 314C-2 DP (6ES7314-6CH04-0AB0) | CPU 314 IFM (6ES7314-5AE10-0AB0) |
|---|---|---|
| Lifecycle | Active | Discontinued 2012 |
| Work memory | 128 KB combined code + data | 64 KB code, 64 KB data |
| Bit memory | 2 048 bytes | 2 048 bytes |
| S7 timers / counters | 256 / 256 | 128 / 128 |
| Integrated DI | 24 total (of which 8 HSC-capable) | 16 total (of which 8 HSC-capable) |
| Integrated DO | 16 total (8 can be used as comparator output) | 16 total |
| Integrated AI | 4, configurable 0..10 V or Pt100 | 0 |
| Integrated AO | 2, configurable ±10 V, 0..10 V or 4..20 mA | 0 |
| Counter channels | 4 | 1 |
| Counter frequency (24 V) | 60 kHz | 10 kHz |
| Counter frequency (TTL) | 200 kHz | n/a |
| Counter modes | Continuous, single, periodic, frequency, PWM | Continuous, single, periodic |
| Communication | MPI + DP master/slave (PtP on -2PtP variant) | MPI + DP master |
| Front connector | 1× 40-pin (DI/DO), 1× 20-pin (AI/AO) | 1× 40-pin (DI/DO only) |
| Programming block | SFB 47 (one instance per channel) | SFB 29 (one instance total) |
| Firmware compatibility | V3.3.x in production | V2.0.x (final) |
The 314C-2 DP wins on every spec category that matters for AC-motor encoder feedback:
- Six times the counter frequency (60 kHz vs 10 kHz) — drives a 1 024-ppr encoder up to ~3 500 RPM without filter-induced count loss.
- Four counter channels instead of one — multiplies the per-CPU encoder channel count.
- On-board analog I/O — eliminates an extra SM334/SM335 when the motor drive also needs a process variable feedback.
- Current firmware support — STEP 7 V5.5 SP2 or higher hosts the HSP for the 314C-2 DP and exposes the technology dialog under HW Config.
Counter Modes and Channel Configuration
Each of the four technology channels on the 314C-2 DP can be set to one of five operating modes. The mode is fixed at configuration time; changing it requires re-downloading HW Config.
| Mode | Name | Typical use |
|---|---|---|
| 0 | Disabled | Channel reserved |
| 1 | Continuous counting (0..4 294 967 295) | Position totalizer; never resets |
| 2 | Single counting (one-cycle, stops at load value) | Length measurement, batch cuts |
| 3 | Periodic counting (reset on compare) | Per-revolution position, indexing |
| 4 | Frequency measurement (Hz) | Motor speed with low pulse count per rev |
| 5 | PWM output (DO level only) | Valve / proportional drive control |
For an AC-motor incremental encoder you typically select mode 1 or mode 3. The decision is whether you want a never-resetting total position or a per-revolution cyclic position. Inside the channel properties in HW Config the following sub-parameters determine behavior:
| Sub-parameter | Values | Note |
|---|---|---|
| Signal evaluation | 1× rising / 1× falling / 2× / 4× | 4× used for quadrature decoding |
| Sensor | 24 V PNP / 24 V NPN / 5 V TTL | Match to the encoder hardware |
| Input filter | 8 µs, 16 µs, 4.8 µs | Select the longest that still passes the encoder frequency |
| HW gate polarity | Active high / active low | Match the wiring convention |
| SW gate default | Open / closed | Holds state across CPU restart |
| Comparator action | Set / reset / toggle / interrupt | Defines DO behavior when the compare value is reached |
| Hysteresis | 0..4 294 967 295 counts | Prevents comparator chatter in continuous operation |
For the eight HSC-capable digital inputs on the 314C-2 DP the channel-to-pin mapping is fixed:
| Channel | Track A | Track B | HW gate |
|---|---|---|---|
| CH0 | DI+0.0 | DI+0.1 | DI+0.2 |
| CH1 | DI+0.3 | DI+0.4 | DI+0.5 |
| CH2 | DI+0.6 | DI+0.7 | DI+1.0 |
| CH3 | DI+1.1 | DI+1.2 | DI+1.3 |
Hardware Configuration in STEP 7 HW Config
STEP 7 V5.5 SP2 with the latest HSP, or STEP 7 V5.6 / TIA Portal V16 or higher, hosts the configuration dialog for the 314C-2 DP. Procedure to enable SFB 47 on a channel:
- Open SIMATIC Manager and the project; double-click HW Config.
- Insert a S7-300 rack with the power supply (PS 305 / PS 307), then drag the CPU 314C-2 DP (6ES7314-6CH04-0AB0) into slot 2.
- Double-click the CPU → Properties → set the PROFIBUS / MPI address and the DP mode if used.
- Switch to the Count tab. Each channel (Count 0..Count 3) is listed; click one to open the Channel Properties dialog.
- In the Operating Mode tab pick one of: continuous counting, single counting, periodic counting, frequency measurement, PWM output.
- In the Inputs tab set signal evaluation, sensor type, and input filter.
- In the Outputs tab configure comparator behavior (set, reset, toggle, hysteresis range).
- In the Gate tab set the HW gate polarity and the SW gate default (open/closed).
- Press OK. Save and compile HW Config (Station → Save and Compile).
- Set the CPU mode switch to STOP, download the HW Config (PLC → Download), then return the switch to RUN.
After the download the channels are initialized with the configured mode and the instance DBs from any pre-existing SFB 47 calls in the S7 program become valid. Calling SFB 47 in OB1 starts the operation.
Encoder Wiring to CPU 314C-2 DP
Wiring an incremental encoder to the 314C-2 DP depends on the supply voltage of the encoder. Pick the 24 V path first; move to the 5 V TTL/RS422 path only when the encoder frequency exceeds 60 kHz.
Wiring: 24 V PNP Encoder
Use shielded twisted-pair cable, clamp the shield on a grounding bar near the panel entry, and avoid running the encoder cable in parallel to VFD power cables. The 40-pin front connector pin assignment for channel 0 is shown below.
| Front connector pin | Signal |
|---|---|
| X1 / 1 | +24 V encoder supply |
| X1 / 20 | 0 V encoder supply |
| X1 / 2 | Track A CH0 (DI+0.0) |
| X1 / 21 | Track B CH0 (DI+0.1) |
| X1 / 3 | HW gate CH0 (DI+0.2) |
| X1 / 22 | Track N CH0 (DI+0.4) — optional index pulse |
Channels 1, 2 and 3 follow the same pattern, shifted by bit offsets of +0.3, +0.6 and +1.1 respectively on the same front connector. Confirm the actual terminal block in your hardware kit because the pin numbering on the printed silkscreen may differ from the manual's reverse-slot numbering.
Wiring: 5 V TTL/RS422 Encoder
For high-frequency encoders (above 60 kHz), connect the encoder through the differential terminals and select "5 V TTL" in the channel properties. The differential terminals accept EIA-422 line levels (≥0.2 V differential).
| Pin | Signal |
|---|---|
| 1 | +5 V supply (200 mA max) |
| 2 | Track A+ |
| 3 | Track B+ |
| 4 | Track N+ |
| 5 | 0 V supply |
| 6 | Track A− |
| 7 | Track B− |
| 8 | Track N− |
| 9 | Cable shield |
Calling SFB 47 in Ladder, FBD and Structured Text
SFB 47 must be called once per used channel per scan cycle of the OB that drives the application. STEP 7 auto-generates an instance DB at the first call; renaming it (for example DB_COUNT_CH0) makes the project easier to read. The block reads the technology area through the process-image input word at LADDR = W#16#100 on the 314C-2 DP.
Ladder (LAD) call
Network 1 — Read channel 0
"DB_COUNT_CH0"(
LADDR := W#16#100,
CHANNEL:= 0,
SW_GATE:= "Tag_SWgate",
CTRL_DO:= FALSE,
SET_DO := "Tag_SetDO",
JOB_REQ:= "Tag_JobReq",
JOB_ID := 1,
JOB_VAL:= W#16#0,
STATUS_H=> "Tag_StatusH",
STATUS_L=> "Tag_StatusL",
STS_GATE=> "Tag_StatusGate",
STS_DO => "Tag_StatusDO",
STS_C_UP=> "Tag_CountUp",
STS_C_DN=> "Tag_CountDn",
COUNTVAL=> "Tag_CountValue");
Function Block Diagram (FBD) call
In FBD the block appears with the inputs on the left and the outputs on the right. Wire LADDR to W#16#100, CHANNEL to constant 0, SW_GATE to a BOOL tag, and bind the seven outputs to seven BOOL/DWORD tags.
Structured Text (ST) call
// One call per channel per OB1 cycle
"DB_COUNT_CH0"(
LADDR := W#16#100,
CHANNEL:= 0,
SW_GATE:= "Tag_SWgate",
CTRL_DO:= FALSE,
SET_DO := "Tag_SetDO",
JOB_REQ:= "Tag_JobReq",
JOB_ID := 1,
JOB_VAL:= DW#16#0,
STATUS_H=> "Tag_StatusH",
STATUS_L=> "Tag_StatusL",
STS_GATE=> "Tag_StatusGate",
STS_DO => "Tag_StatusDO",
STS_C_UP=> "Tag_CountUp",
STS_C_DN=> "Tag_CountDn",
COUNTVAL=> "Tag_CountValue");
Counter value to motor speed conversion
Once COUNTVAL is stable in OB35 (a 100 ms interrupt OB) the application can derive motor speed. With a counter running in mode 4 (frequency measurement) the block returns Hz directly. With mode 1 or 3 the application divides by a fixed window:
n_RPM := (("Tag_CountValue" - "Tag_CountValuePrev")
/ REAL#4.0
/ "Encoder_PPR"
/ "Window_Seconds") * 60.0;
Where:
-
Tag_CountValue— current COUNTVAL inside SFB 47 -
Tag_CountValuePrev— snapshot taken at the start of the window -
Encoder_PPR— pulses per revolution of the encoder (for 4× evaluation: divide by 4) -
Window_Seconds— measurement window in seconds, e.g. 0.5 s for 500 ms
For a 1 024-ppr quadrature encoder (effective 4 096 counts per revolution) the formula becomes:
n_RPM := (delta_counts / 4096.0 / window_seconds) * 60.0;
Validate against a tachometer or an inverter display; the calculated RPM should agree within ±2 counts of measurement noise.
SFB 47 Input and Output Parameter Reference
Inputs
| Parameter | Type | Range / meaning |
|---|---|---|
| LADDR | WORD | Process-image input address of the technology area; W#16#100 on 314C-2 DP |
| CHANNEL | INT | 0..3 on 314C-2 DP; 0..2 on 314C-2 PtP; select according to HW Config |
| SW_GATE | BOOL | Software gate; AND-combined with HW gate |
| CTRL_DO | BOOL | Enable the comparator output behavior |
| SET_DO | BOOL | Force-set the comparator DO while TRUE |
| JOB_REQ | BOOL | Rising edge triggers a job |
| JOB_ID | INT | 1..7 selects the requested action (see below) |
| JOB_VAL | DWORD | Value associated with JOB_ID 2..6 |
Outputs
| Parameter | Type | Meaning |
|---|---|---|
| STATUS_H | WORD | High byte of diagnostic status |
| STATUS_L | WORD | Low byte of diagnostic status (bit-coded) |
| STS_GATE | BOOL | TRUE = gate currently active |
| STS_DO | BOOL | Current state of the comparator digital output |
| STS_C_UP | BOOL | TRUE = last increment was up |
| STS_C_DN | BOOL | TRUE = last increment was down |
| COUNTVAL | DWORD | Current count value (0..4 294 967 295 unsigned) |
JOB_ID values
| JOB_ID | Action | JOB_VAL usage |
|---|---|---|
| 0 | Idle (default after warm restart) | — |
| 1 | Read current count value | — |
| 2 | Read / write the load value | New load value (32-bit) |
| 3 | Read / write the comparator value | New compare value (32-bit) |
| 4 | Read / write the hysteresis | New hysteresis in encoder steps |
| 5 | Read / write the period (frequency mode) | New period in ms |
| 6 | Read / write the gate pulse width | New gate pulse width (HW gate pulse mode) |
| 7 | Reset counter to 0 | — |
A job is processed on the rising edge of JOB_REQ. The result reflects in STATUS_L within one OB1 cycle. Always reset JOB_REQ in the application code once the job is acknowledged (read STATUS_L bit 6 = 0x0040, "job complete").
Diagnostic and Status Behavior
The STATUS_L word is bit-coded. Reading the bit pattern correctly is essential for diagnostics on encoder cable faults, compare-threshold overruns, and overflow detection during start-up.
| Bit | Hex when set | Meaning |
|---|---|---|
| 0 | 0x0001 | Counter overflow since last read |
| 1 | 0x0002 | Counter underflow since last read |
| 2 | 0x0004 | Comparator low threshold passed |
| 3 | 0x0008 | Comparator high threshold passed |
| 4 | 0x0010 | Hardware error: encoder wire break, missing signal |
| 5 | 0x0020 | Diagnostic interrupt pending |
| 6 | 0x0040 | Job complete (acknowledge JOB_REQ) |
| 7 | 0x0080 | Job still running |
| 8..15 | 0x0100..0x8000 | Channel-specific flags (see Siemens manual entry 12429336) |
Two recommended patterns in the application code:
- Sample
STATUS_Linto a non-volatile word every OB1 cycle, compare against the previous value, and raise a controlled motor stop when bit 4 toggles (cable break) or bit 0 toggles (overflow). - After every job edge, confirm bit 6 returns to 1 within two SFB 47 calls. A stuck-zero means the technology unit did not see
JOB_REQ, typically the result of anLADDRtypo, a wrongCHANNEL, or the CPU being in STOP.
STATUS_L is channel-specific. Always verify the bit field against the CPU's firmware documentation (CPU 31xC Technological Functions) before acting on it.Migrating from CPU 314 IFM (SFB 29) to CPU 314C-2 DP (SFB 47)
Migration is recommended when any of the following is true:
- CPU 314 IFM fails and no spare is available.
- The new project requires more than 10 kHz counter frequency.
- The new project requires more than one counter channel.
- The new project requires a PWM output from the same CPU.
- STEP 7 V5.5 SP2 or higher is the engineering standard for the site.
Procedural migration steps:
- Open the existing STEP 7 project. In the symbol table capture every DB member used by SFB 29 (typically COUNTVAL, STS_GATE, STS_DO, STATUS, plus any internal flags).
- Add a new S7-300 station, mount a CPU 314C-2 DP (6ES7314-6CH04-0AB0), copy the rack and SM modules. Re-write any SM part numbers that may have been discontinued.
- Re-wire the encoder to the new channel mapping (see wiring section).
- Replace every call of SFB 29 with a call of SFB 47.
- Adjust the parameter wiring as follows:
| SFB 29 input/output | SFB 47 equivalent | Note |
|---|---|---|
| LADDR | LADDR | Confirm PII offset equals W#16#100 |
| CHANNEL | CHANNEL := 0 | Single on-board counter on the 314 IFM maps to channel 0 |
| SW_GATE | SW_GATE | Set to TRUE for the legacy behavior (HW-gate only) |
| JOB_REQ | JOB_REQ | Same behavior |
| JOB_ID | JOB_ID | Values 1..7 are identical |
| JOB_VAL | JOB_VAL | Same 32-bit value range |
| STATUS | STATUS_H + STATUS_L | Status split into two words; update consumers |
| COUNTVAL | COUNTVAL | Same 32-bit unsigned value |
| STS_GATE | STS_GATE | Same meaning |
| STS_DO | STS_DO | Same meaning |
- Migrate the load values, comparator thresholds, and hysteresis from the HMI pages to the new instance DB constants.
- Re-test with the original motor. Watch
COUNTVAL, the comparator DO state, and theSW_GATEtransitions. - For projects that need to retain the original archive, lock the legacy project read-only and rebuild the active code on the 314C-2 DP profile.
Commissioning and Verification Procedure
- Power up the CPU. The SF (system fault) and BF (bus fault) LEDs must be off.
- With the mode switch in STOP, configure HW Config and download to the CPU.
- Download the STEP 7 user program containing the SFB 47 call in OB1 and a minimal OB100 (startup) OB.
- Switch the mode selector to RUN. The CPU enters RUN with no fatal error.
- Open "Monitor / Modify" on the instance DB and force
SW_GATEto FALSE;COUNTVALremains static. - Set
SW_GATEto TRUE. Rotate the encoder shaft by hand.COUNTVALincrements in steps equal to the configured edge evaluation. For a 1 024-ppr encoder with 4× evaluation one mechanical revolution yields 4 096 increments. - Drive the encoder with a fixed-frequency signal generator (e.g. 5 kHz at 50 % duty) and read
COUNTVALandSTATUS_L. Bit 6 ("job complete") should toggle within two OB1 cycles after the nextJOB_REQ. - Run the AC motor up to operational speed. Confirm
COUNTVALupdates every OB1 cycle andSTATUS_Lbit 0 stays zero. If bit 4 toggles, check the encoder cable shield and ground-loop wiring. - Drive a controlled stop. Issue
JOB_ID := 7(reset counter) on a risingJOB_REQ; confirmCOUNTVALreturns to zero andSTATUS_Lbit 6 sets.
Field-proven checks
| Symptom | Likely cause | Fix |
|---|---|---|
| SFB 47 returns STATUS_L = 0x0040 but COUNTVAL never advances | Wrong LADDR; not pointing to the technology PII | Confirm LADDR = W#16#100 in the project |
| COUNTVAL stuck at zero with motor turning | SW_GATE off, or HW gate pin not wired correctly | Force SW_GATE TRUE in watch table; verify HW gate input polarity matches HW Config |
| Comparator DO never toggles | CTRL_DO / SET_DO not wired correctly; compare value outside range | Drive SET_DO from application, force compare value within reach of COUNTVAL |
| SF LED on after HW Config download | Firmware does not support configured mode | Upgrade firmware to ≥ 2.0.x for PWM and frequency modes |
| Counts drop by 1 every revolution | Encoder supply bounce | Add external 24 V supply; separate 0 V reference |
Spare-Parts and Lifecycle Planning
Because the CPU 314 IFM (6ES7314-5AE10-0AB0) has been discontinued, no spare units are produced. Sites that still need an SFB 29-class encoder counter should plan a one-time migration to the 314C-2 DP, even if the legacy code is to be kept in a frozen archive. The manuals at CPU 31xC Technological Functions and CPU 314 IFM operating manual remain available on the Siemens support portal, but no firmware updates will be issued for the 314 IFM. Symbolic and numerical references for SFB 47 (block number 47, name "COUNT") and the wider S7-300/S7-400 instruction set are documented in the Siemens TIA documentation portal.
Frequently Asked Questions
What is the primary difference between SFB 29 and SFB 47?
SFB 29 is the legacy COUNT block for the CPU 314 IFM only (MLFB 6ES7314-5AE10-0AB0). SFB 47 is the current COUNT block for the CPU 31xC family and the ET 200S 1COUNT terminal. Both share the same job interface (JOB_REQ + JOB_ID 1..7 + JOB_VAL), but SFB 47 adds software-gate control, per-channel hysteresis, PWM support, and access to four independent counter channels instead of one.
Can I use SFB 47 on a non-31xC CPU?
No. SFB 47 is bound to the technology objects of the compact CPU 31xC family (CPU 314C-2 DP, CPU 314C-2 PtP, CPU 314C-2 PN/DP) and the ET 200S 1COUNT terminal. Standard CPUs such as CPU 314 or CPU 315-2 DP expose no technology area, and the call will fault in OB1.
What is the maximum encoder frequency on the 314C-2 DP with SFB 47?
60 kHz on the 24 V single-ended inputs, or 200 kHz on the 5 V TTL/RS422 differential terminals when the differential path is selected in HW Config and the CPU firmware supports it. Verify the firmware version of your specific CPU against the CPU 31xC Technological Functions manual.
How do I migrate an SFB 29 call to SFB 47?
Replace the block type in the program editor, set LADDR := W#16#100, set CHANNEL := 0 (the single on-board counter on the 314 IFM), tie SW_GATE := TRUE for legacy behavior, regenerate the instance DB, and rename it to a project-friendly tag. Update every consumer of the SFB 29 STATUS word to the new STATUS_H / STATUS_L split, then re-test every motor control path against the new behavior.
Which JOB_ID value reads the current count?
JOB_ID := 1. The block also exposes the current count directly in the COUNTVAL output without any job execution. Use the JOB_REQ / JOB_ID path when you need a deterministic snapshot for a control loop, for example a position sample on a cam rising edge.