Controlling VFD Motor Speed via S7-300 Analog Output and WinCC

1. Overview and Scope

This reference covers controlling an induction motor's speed via a variable frequency drive (VFD) using a SIMATIC S7-300 PLC. The reference speed is generated by the PLC through an analog output module (SM332) and written to the VFD's analog input (typically 0-10 V or 4-20 mA). Operator speed setpoints, ramp start/stop, and status feedback are surfaced on a WinCC runtime screen.

The architecture replaces a passive 3-wire potentiometer (10 kΩ, wiper fed to the VFD's AI) with an active analog voltage/current source driven by the S7-300 program. The mechanical potentiometer is retained only as a manual fallback; the analog output is paralleled or switched depending on the application.

Closed-loop speed regulation is supported by reading a feedback signal (motor shaft tachogenerator, encoder pulse train decoded by FM350-1 / counters, or the VFD's analog output representing its measured frequency) back into an SM331 analog input. The control law is implemented as a Siemens FB "PID_CP" or FB 41/FB 42 from the STEP 7 Standard Library.

2. Prerequisites and Information Checklist

Before commissioning, gather the following data so that the I/O range, scaling, and PID tuning are correct on first power-up:

• VFD analog input specification: voltage (0-10 V, ±10 V) or current (0-20 mA, 4-20 mA), input impedance, and which terminal receives the speed reference. VFD manuals also list whether the input is differential or single-ended referenced to analog ground.
• VFD control source priority: confirm that the VFD is set to follow the analog reference (P0004 = 1 or equivalent parameter) and not keypad frequency, fixed setpoint, or fieldbus (Modbus / PROFIBUS).
• VFD analog output feedback: terminals that emit actual frequency, motor current, or output voltage (typically 0-10 V proportional to 0-max Hz).
• Motor nameplate: rated power (kW), full-load current (A), rated speed (rpm), nominal frequency (Hz), and number of poles. These determine the maximum Hz setpoint and the ramp profile.
• Speed feedback device: incremental encoder (HTL 24 V, 1024 ppr is common), tachogenerator (0-60 V DC), or VFD-derived analog. Encoder lines per revolution determines the conversion to RPM.
• PLC configuration: CPU 31x-2 PN/DP, 31x-2 DP, or 31xC series; rack width and slot count to fit SM332 plus SM331 plus any FM counter.
• Engineering tool: STEP 7 V5.5 + SP2 or higher (recommended for legacy S7-300), or TIA Portal V16+ with S7-300 CPU HSPs (compatibility is limited to older 31x series and the SM332 6ES7332-5HB01-0AB0).

3. Hardware Selection: S7-300 Modules

For a single-motor speed reference with analog feedback, the typical slot allocation is:

The recommended analog output module, 6ES7332-5HB01-0AB0, provides 2 isolated channels with selectable output type per channel via the front connector pin-out. Output ranges supported per channel:

• Voltage: 0-10 V, ±10 V, 1-5 V
• Current: 0-20 mA, 4-20 mA, ±20 mA

Resolution is 12 bits + sign (voltage) or 12 bits (current unipolar). Settling time for a resistive load is 0.8 ms to within 1% of full-scale. The module is galvanically isolated to 500 V DC between channels and backplane. Diagnostics include wire-break detection for current outputs and short-circuit detection for voltage outputs.

4. Wiring the Analog Interface

The SM332 front connector is a 20-pin screw terminal with shield contact. Pin assignments for a voltage output on channel 0 and current output on channel 1:

For VFD wiring using 0-10 V (most common VFD reference type):

1. Connect SM332 pin 1 (Q0+) to VFD AI+ terminal (often labeled AI, AIN, +, or V_IN).
2. Connect SM332 pin 11 (MANA) to VFD AI- terminal (AIN-, COM, or GND_AI).
3. Use a shielded twisted pair (LiYCY 2 x 0.34 mm² or equivalent). Ground the shield at the cabinet entry gland only, leaving the VFD end floating, to avoid ground-loop currents that bias the analog reference.
4. Bind the cable to the backplane ground rail within 100 mm of the module.
5. On the VFD, set the analog input selector (hardware jumper or parameter) to "Voltage" and select 0-10 V range.

For 4-20 mA current loops, the SM332 internally routes the current source; pin 2 (Q1+) becomes the loop driver and pin 11 is the loop return. Wire-break detection in the 4-20 mA mode will flag a fault to the CPU if the loop opens, which is preferred for safety-critical applications.

The legacy 3-wire potentiometer can be retained as a manual backup by installing a 2-pole selector switch that toggles between the SM332 output and the wiper of the pot. The SM332 will hold 0 V when the CPU is in stop, so a brief ramp-down glitch occurs during switchover unless a make-before-break switch is used.

5. STEP 7 Programming: Scaling and Output

The analog output word in the S7-300 is mapped to peripheral input area (PIW/PQW). For slot 3 with the SM332 above, the channel 0 output word is PQW 304 by default in HW Config. STEP 7 represents analog values as integers in the range -27648 to +27648 (for bipolar) or 0 to 27648 (for unipolar). The mapping to the engineering range:

The Standard Library provides FC106 "UNSCALE" which converts a real-world engineering value (0.0 to 100.0%) to a raw integer suitable for PQW. The block call is:

CALL "UNSCALE" // FC106
  IN    := MD100   // REAL 0.0 .. 100.0  (percent of full scale)
  LO_LIM:= 0
  HI_LIM:= 27648
  BIPOLAR:= FALSE
  OUT   := PQW304   // analog output to VFD

To convert an HMI tag in RPM (0 to 1500) to a percent for FC106, divide by 1500.0 and clamp to 0.0-100.0. The complete OB1 segment:

// Ladder / STL equivalent for OB1 Segment 1
L     MD200        // SpeedSetpoint_RPM (REAL, from WinCC tag)
L     1500.0
/R
T     MD100        // Setpoint percent (clamped upstream by WinCC input field limits)

CALL "UNSCALE"
  IN    := MD100
  LO_LIM:= 0
  HI_LIM:= 27648
  BIPOLAR:= FALSE
  OUT   := PQW304

For bipolar reference (motors that need reverse rotation), change BIPOLAR=TRUE and the integer range becomes -27648 to +27648. The VFD's analog range must also be set to ±10 V or ±20 mA accordingly.

The block FC105 "SCALE" converts the feedback integer from the VFD's analog output (read by SM331 as PIW 288) back to engineering units. Same LO_LIM / HI_LIM conventions apply.

6. TIA Portal Configuration (Optional)

If the CPU is in TIA Portal V16+ with an HSP for the CPU 315-2 PN/DP (6ES7315-2EH14), configuration is in the device view:

1. Add SM332 from the catalog (right-click Device view → Add new device).
2. In Properties → Outputs, set Channel 0 to "Voltage 0-10 V". Output address is assigned by TIA Portal, typically QW256.
3. Add the global tag Speed_Ref_Pct (REAL) and assign to the analog output tag at runtime by using SCALE_X and NORM_X blocks from the IEC math library, or use UNSCALE from the legacy PCS 7 library if migrated.
4. Configure the analog input module (SM331) range to 0-10 V for the VFD feedback channel.

Note that TIA Portal V18+ has dropped several older S7-300 modules from its HSP list. For new projects, migrate to S7-1500. For S7-300 maintenance, remain on STEP 7 V5.5 or TIA Portal V16.

7. WinCC (Classic or TIA) HMI Configuration

The HMI displays the speed setpoint, actual speed (from VFD feedback or encoder-derived RPM), motor current, and a Start/Stop/Jog cluster. Tag links are as follows:

Configuration steps in WinCC Flexible 2008 SP5 / TIA WinCC Comfort:

1. Insert a new connection "PLC1" pointing to the S7-300, set MPI/PROFIBUS or PROFINET address.
2. Create the tags above with the matching PLC addresses. Cycle: 1 s for display values, 200 ms for command bits.
3. Add an I/O field for SpeedSetpoint_RPM with limits 0 and 1500.
4. Add a bar gauge for SpeedActual_RPM with limits 0 and 1500.
5. Add a screen page change to a "Motor Detail" view showing current, torque (if VFD exposes it), and reference/actual trend.
6. Configure access protection so only authorized users can change the setpoint while the motor is running.

A ramp block is required in the S7-300 program to convert step changes on the HMI setpoint to a controlled ramp at the analog output. Without ramping, a sudden change from 0 to 1500 rpm on the operator screen will cause an overcurrent trip in the VFD. A simple STL snippet:

// Ramp generator - Segment 2, OB35 (cyclic interrupt 100 ms)
L     DB1.DBD0       // target speed (rpm)
ITD
DTR
T     MD110          // target as REAL

L     MD112          // last output (rpm)
L     5.0            // ramp rate (rpm per 100 ms = 30 rpm/sec)
+R
T     MD114          // ramped upper limit

L     MD112
L     5.0
-R
T     MD116          // ramped lower limit

L     MD110
L     MD114
>R
JC    RUP
L     MD110
L     MD116

8. Closed-Loop Speed Control with FB "PID_CP"

For accurate speed holding under varying loads, implement PI control. The PID self-tuner FB "PID_CP" (PCS 7 V9 / STEP 7 V5.6) supports online tuning. For older installations, FB 41 "CONT_C" from the Standard Library is adequate.

1. Place FB 41 instance DB100 in OB35 (100 ms). Wire:
   • SP_INT = MD110 (ramped setpoint in %)
   • PV_IN = MD120 (actual value in % from FC105 of SM331 input)
   • MAN = MD130 (manual override from HMI)
   • LMN_PER (output, REAL) → use UNSCALE → PQW304
2. Start with GAIN = 1.0 and TI = 10000 ms (disabled I-term) for initial commissioning. Tune up the gain until you see a 10% overshoot on a step response, then halve it.
3. Bring TI down from 10000 ms in steps of 1000 ms until the steady-state error vanishes.

9. Commissioning Procedure

1. Verify wiring polarity with a multimeter before powering the VFD. With PLC in stop, measure 0 V across the analog inputs of the VFD.
2. Power the PLC. In STEP 7 / TIA Portal, go online and force PQW304 = 0. Verify on the VFD's analog input monitor that 0 V is present.
3. Force PQW304 = 27648 (10 V). The VFD should show 10 V on its analog input monitor and ramp to maximum frequency. Confirm VFD is in external reference mode.
4. Disable the VFD output (STOP command from PLC). Force 13824 (50%). Re-enable. Motor should ramp to 50% rated speed.
5. Switch the PLC to run mode and download the program. Set HMI setpoint to 300 rpm. Verify the bar graph updates and the actual speed matches within ±5%.
6. If using an encoder, compare the PLC's calculated RPM (from FM350-1 or integrated counter) with the VFD's internal motor model estimate. A discrepancy > 10% suggests wrong encoder wiring or incorrect PPR in the counter block.
7. Perform a no-load step test: 0 → 80% setpoint, observe overshoot, adjust PID.
8. Load test with motor under torque (pump, fan, conveyor). Observe stability and confirm drive does not fault on overcurrent during ramp.

10. Troubleshooting Matrix

11. Field-Proven Cautions and Engineering Tips

• Always configure the SM332 output type in HW Config, not just the wiring. The module internally routes either a voltage or current DAC; selecting both will produce undefined behavior and may trigger diagnostics.
• The 6ES7332-5HB01-0AB0 has two isolated channels. Do not parallel them to double the drive capability; instead, use each channel for a different drive and provide external electrical isolation to the VFDs.
• Set the VFD's analog input filter (e.g., ABB parameter 30.02, Danfoss 6-50) to the lowest stable value to avoid additional lag in the control loop.
• Keep analog signal cables at least 200 mm from motor output cables inside the cabinet. Cross them at 90° if unavoidable.
• Update the S7-300 CPU firmware to the latest release (CPU 315-2 PN/DP V3.3.17 or higher) for stable PROFINET IO communication with TIA Portal V18 projects.
• When the PLC transitions from RUN to STOP, the analog output freezes at the last value. Implement a safety policy in OB100 / OB101 to write 0 V to PQW304 on startup and on STOP events so the VFD ramps the motor to zero.
• If the motor runs in the wrong direction and you do not have a bipolar signal, swap any two of the three VFD output phases (U, V, W). Do not swap the analog polarity — VFD direction is determined by the digital input "FWD/REV" or by the sign of the analog reference in bipolar mode.

12. Verification Checklist