S7-314C-2DP FB Size Limit: Replacement and Sizing Options

David Krause16 min read
S7-300SiemensTechnical Reference
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S7-314C-2DP FB Block-Size Limit: Root Cause, Migration, and CPU Replacement

The SIMATIC S7-300 compact CPU 6ES7 314-6CG03-0AB0 (CPU 314C-2DP, firmware V2.0 / V2.6) ships with an integrated technological function set and 24 DI / 16 DO / 5 AI / 2 AO onboard I/O. Its work memory of 96 KB is sufficient for many machines, but the CPU imposes a hard ceiling of 16,420 bytes per FB or FC block. Programs originally written in STL (Statement List) and later translated to FBD (Function Block Diagram) routinely exceed this limit because FBD compilation produces 20 % to 250 % more MC7 instructions than optimized STL for the same logic. This article documents the root cause, the engineering workarounds, and the hardware replacement paths that preserve the existing I/O and PROFIBUS topology.

1. Problem Statement and Field Symptom

A typical symptom during the STEP 7 download to a 6CG03 (S7-300 / S7-400 Programming and Operating Manual, see Siemens Online Support) is error W#16#7002 "Block too long" or the STEP 7 dialog:

Error in block FB<n>:
Block length 19,500 bytes exceeds maximum of 16,420 bytes.
Do you want to continue without this block?

Three recovery paths are available without rewriting application logic:

  1. Hardware migration to a CPU with a larger per-block ceiling (6CH04-0AB0, 315-2AH14, or 317-2AJ10).
  2. Block splitting of the offending FB into two or more smaller blocks, each smaller than 8 KB MC7.
  3. Source re-translation from FBD back to STL where STL is denser.

Path 1 is preferred when the program is settled and project cost is dominated by commissioning time. Path 2 is preferred when the hardware replacement has a long lead-time or the project is locked to the existing part number.

2. Root Cause: MC7 Code, Block-Length Field, and FBD Expansion

The STEP 7 compiler emits MC7 machine code. Each block header in the offline block container carries a 24-bit block-length field, but the on-CPU loader for the original 314C-2DP uses a 16-bit field. The runtime interpreter further restricts per-block code to 16,384 MC7 words because the block-prologue offsets in the firmware are 16-bit signed. The 16,420-byte figure reported in the field includes the 36-byte block header plus stack and instance local data.

When the FBD source compiles, each network produces an interim STL representation that is then re-assembled into MC7. FBD networks store both the input-condition mask and the rung-result in a temporary variable, doubling register pressure for conditional and bit-logic operations. Typical expansion ratios observed in compiled S7-300 projects:

Logic family STL (bytes) FBD (bytes) Growth
Bit logic AND / OR chains 18 26 1.44×
Comparator + branch 12 22 1.83×
Word math (ADD / SUB / MUL / DIV) 24 40 1.67×
Counter / timer reset pattern 30 64 2.13×
Complex FC / FB call wrapper 80 192 2.40×
Conditional SET / RESET with multi-instance 48 110 2.30×

For a balanced FBD program the average growth is 1.5× to 1.8×. A pre-translation FB of 11 KB becomes 16-20 KB, sitting exactly at the 314C-2DP ceiling.

3. Affected CPU and Replacement Inventory

Order Number (MLFB) Designation Firmware Work Memory Max FB/FC Size Onboard I/O Tech Functions
6ES7 314-6CG03-0AB0 CPU 314C-2DP (compact) V2.0 / V2.6 96 KB 16,420 bytes 24 DI / 16 DO / 5 AI / 2 AO + 2 Pt1000 HSC, FM, positioning, PID, PWM
6ES7 314-6CH04-0AB0 CPU 314C-2DP (compact, successor) V3.3 192 KB 64 KB 24 DI / 16 DO / 5 AI / 2 AO + 2 Pt1000 HSC, FM, positioning, PID, PWM
6ES7 315-2AH14-0AB0 CPU 315-2DP (standard) V3.0 384 KB 64 KB None None
6ES7 317-2AJ10-0AB0 CPU 317-2DP (high-end) V3.3 1,024 KB 64 KB None None

The integrated technological functions of the 314C-2DP family include:

  • Four high-speed counters, software-selectable up to 60 kHz (24 V incremental).
  • One SSI encoder channel, up to 1 MHz on specific inputs.
  • Frequency measurement and period-duration measurement.
  • Digital positioning (cam, linear, rotary axis) via SFB 46 / SFB 47 / SFB 48.
  • Analog positioning (PID) via SFB 41 / 42 / 43 / 44.
  • Pulse-width modulation (PWM) up to 2.5 kHz via SFB 49.
  • PTO pulse-train output for stepper drives.

4. SFB 41-49 Inventory Procedure

Before selecting a destination CPU, the program must be inventoried for technology function use. The 314C-2DP exposes its integrated functions through the following SFBs:

SFB Function Standard-CPU replacement
SFB 41 CONT_C (continuous PID) FM 455 or logic FB
SFB 42 CONT_S (step PID) FM 455 or logic FB
SFB 43 PULSEGEN FM 455 or logic FB
SFB 44 NORM_X (scaling) FC 105 / FC 106 in program
SFB 46 DIGITAL (digital positioning) FM 354 + SM 338
SFB 47 COUNT (high-speed counter) FM 350-1 or ET 200S 1COUNT
SFB 48 FREQUENC (frequency measurement) FM 350-1 or ET 200S 1COUNT
SFB 49 PULSE (PWM output) FM 354 or SM 338 PTO

Inventory procedure in STEP 7 / TIA Portal:

  1. Open the project, right-click the Program folder, choose Cross References.
  2. Filter on the symbol names "SFB 41" through "SFB 49". Note the FB / FC / OB where each is called.
  3. Open each instance DB, record the channel number, the encoder type, and the count limits.
  4. If the inventory is empty, the program is portable to a standard CPU. If any SFB is referenced, the destination must preserve the technology (i.e. choose 6CH04-0AB0 or external FM modules).

5. Replacement Option 1: 6ES7 314-6CH04-0AB0 (Drop-in)

The 6CH04 is the latest generation of the 314C-2DP. It has the same onboard I/O map and the same technological function set, so wiring, PROFIBUS address, and program symbols are preserved.

Parameter 6CG03 (current) 6CH04 (replacement)
Work memory, total 96 KB 192 KB
Code work memory 64 KB 128 KB
Data work memory 32 KB 64 KB
Max FB / FC size 16,420 bytes 64 KB
Max DB size 16 KB 64 KB
Bit memory (M) 8,192 bytes 16,384 bytes
S7 timers / counters 512 / 512 2,048 / 2,048
Local data per priority class 1,024 bytes 4,096 bytes
Number of FBs / FCs / DBs 1,024 / 1,024 / 1,024 2,048 / 2,048 / 2,048
Firmware update from MMC No Yes
MMC requirement Optional Mandatory, ≥ 2 MB

5.1 Migration Procedure

  1. In STEP 7 / TIA Portal, verify that the hardware catalog lists the 6CH04 (SIMATIC 300 → CPU 314C-2DP → 6ES7 314-6CH04-0AB0).
  2. If the project was opened with STEP 7 V5.5 SP2 or earlier, install Hardware Support Package (HSP) 0299 or later, downloadable from the Siemens Online Support entry for the part number.
  3. In HW Config, drag the 6CH04 over the existing 6CG03. STEP 7 prompts to keep the configuration - click Yes. The rack slot, PROFIBUS address, and onboard I/O addresses are preserved.
  4. Open the CPU properties → Cycle / Clock Memory. Verify that OB 1 cycle time and clock-memory byte are still correct.
  5. Re-compile the program blocks: Program → Compile All. Confirm in the Blocks view that no block exceeds 64 KB.
  6. Insert a SIMATIC MMC 6ES7 953-8LF00-0AA0 (2 MB) or 6ES7 953-8LG00-0AA0 (4 MB). The 6CH04 will not enter RUN without an MMC.
  7. Download the hardware configuration (system data) and the user program to the new CPU.
  8. Perform a memory reset (MRES) and a cold restart (OB 100). Confirm RUN state, no diagnostic-buffer entries for block length.
MMC size: The 6CH04 requires at least 2 MB. A 512 KB MMC from the 6CG03 will trigger a "Cartridge missing" stop on power-up. Order 6ES7 953-8LF00-0AA0 for the 2 MB card or 6ES7 953-8LG00-0AA0 for the 4 MB card.

6. Replacement Option 2: 6ES7 315-2AH14-0AB0 (Standard CPU)

The 315-2DP is the standard successor in the S7-300 line. It has no onboard I/O, but its work memory and per-block ceiling are sufficient for almost any 314C-2DP program.

6.1 When to Choose

  • The program does not use the integrated technological functions (HSC, FM, positioning, PID, PWM).
  • The user is willing to migrate the 24 DI / 16 DO / 5 AI / 2 AO wiring to a separate IM-153 slave, an ET 200S station, or an ET 200SP station.

6.2 Hardware Delta

Item 314C-2DP (6CG03) 315-2DP (6AH14)
Onboard DI (X11) 24 (0.0 - 2.7) 0
Onboard DO (X12) 16 (0.0 - 1.7) 0
Onboard AI (X10) 5 (channel 0 - 4) 0
Onboard AO (X10) 2 (channel 0 - 1) 0
Pt1000 / Ni1000 (X10) 2 (channel 6 - 7) 0
HSC, FM, positioning Yes No (use FM 350-1, FM 354, FM 455)
PROFIBUS DP master 1 (X2) 1 (X2)
MPI / DP master 1 (X1) 1 (X1)
Bit memory 8,192 bytes 16,384 bytes
S7 timers / counters 512 / 512 2,048 / 2,048

6.3 I/O Migration Strategy

  1. Add an IM 153-2 (6ES7 153-2BA02-0XB0) as PROFIBUS slave, with SM 321 (6ES7 321-1BL00-0AA0) for the 24 DI and SM 322 (6ES7 322-1BL00-0AA0) for the 16 DO.
  2. Add SM 331 (6ES7 331-1KF02-0AB0) for the 5 AI and 2 Pt1000 / Ni1000 channels. Configure the input type (0-10 V, ±10 V, 4-20 mA, RTD) via HW Config, not by DIP switch on the 331 module.
  3. Add SM 332 (6ES7 332-5HB01-0AB0) for the 2 AO.
  4. Re-allocate input and output byte addresses. Onboard DI 0-7 of the 314C-2DP occupies IB 0 - IB 2 by default. When moved to SM 321 in slot 4, the address becomes IB 0 - IB 1 (16 channels = 2 bytes). The HS counters, which were at IW 752 - IW 767 in the onboard area, must be moved to the FM 350-1 / ET 200S 1COUNT data block (default DBW 0 of the associated instance DB).
  5. Search and replace the program references to the old address range.

6.4 Technology Function Removal

All SFB 41-49 calls must be removed from the user program and replaced with logic FBs, FM modules, or a combination:

  • PID → FM 455 (6ES7 455-0VS00-0AE0) in a separate rack, called via PIW / PQW address range.
  • Counting → FM 350-1 (6ES7 350-1AH03-0AE0) in slot 5-8 of the central rack, instance DB 1.
  • Positioning → FM 354 (6ES7 354-1AH01-0AE0) plus SM 338 POS encoder interface.
  • Frequency measurement → FM 350-1 channel in mode "frequency".

For a project that uses SFB 44 (NORM_X) only, replace the SFB call with FC 105 (SCALE) and FC 106 (UNSCALE) in the program. No hardware change required.

7. Replacement Option 3: 6ES7 317-2AJ10-0AB0 (High-End)

The 317-2DP offers 1 MB of work memory. It is justified only when the application is genuinely large (more than 1,000 FBs, hundreds of I/O bytes on PROFIBUS, or complex motion choreography that the 315-2DP can hold but cannot execute fast enough). For a pure FB-size problem, the 315-2DP is cheaper and equivalent.

Parameter 315-2DP 317-2DP
Work memory 384 KB 1,024 KB
Bit memory 16,384 bytes 32,768 bytes
Number of FBs / FCs / DBs 2,048 / 2,048 / 2,048 2,048 / 2,048 / 2,048
Bit operations execution time 0.1 µs 0.05 µs
Word operations execution time 0.2 µs 0.1 µs
PROFIBUS DP master / slave 1 / 0 1 / 1

8. Block Splitting Without Hardware Migration

If hardware migration is constrained (long lead-time, qualification paperwork, customer-prohibited substitution), the offending FB can be split. This adds 1-2 hours of STEP 7 work but no hardware cost.

8.1 Identify the Seams

Natural seams in an FBD program:

  • State-transition boundaries (auto / manual / service state).
  • Recipe-change boundaries.
  • Analog-channel boundaries (per-channel processing).
  • Sub-axis boundaries (axis 1 / axis 2 / axis 3 logic).

8.2 Define the Interface

Group the FBD networks into 2-3 sub-FBs, each smaller than 8 KB MC7. Define a shared UDT plus a parameter-instance DB that holds the working data:

TYPE UDT_100
STRUCT
  // shared state
  State : WORD ;          // bits 0-15 represent state flags
  Request_Auto : BOOL ;
  Request_Manual : BOOL ;
  // analog data
  Ai_Raw : ARRAY [0..4] OF INT ;
  Ao_Out : ARRAY [0..1] OF INT ;
  // axis data
  Axis1_Position : DINT ;
  Axis1_Velocity : DINT ;
  // diagnostics
  ErrorCode : WORD ;
END_STRUCT
END_TYPE

8.3 Replace the Original FB with a Wrapper

Replace the original FB with a wrapper OB segment that calls the new sub-FBs in sequence, passing the shared UDT:

// in OB 1
CALL FB 100, DB 100      // FB 100: input pre-processing
  UDT_IN  := DB200.UData // shared UDT
CALL FB 101, DB 101      // FB 101: control core
  UDT_IN  := DB200.UData
CALL FB 102, DB 102      // FB 102: output post-processing
  UDT_IN  := DB200.UData

8.4 Re-compile and Verify

  1. Right-click Program → Check Block Consistency. All sub-FBs should report length ≤ 8 KB MC7.
  2. Compare the wrapper OB scan time with the original FB scan time. The wrapper adds 5-8 µs per sub-FB call, which is usually negligible.
  3. Run a S7-PLCSIM pass before the real-CPU download. Confirm the same scan-time budget.

9. STEP 7 vs TIA Portal Migration Path

Source project Target Toolchain Procedure
STEP 7 V5.5 / V5.6 STEP 7 V5.5 / V5.6 HW Config + S7 program Replace CPU in HW Config, install HSP 0299, re-compile, download
STEP 7 V5.5 / V5.6 TIA Portal V16+ Project Migration Tool Project → Migrate project to TIA Portal, then re-target the CPU in the TIA Portal device view
TIA Portal V13-V15 TIA Portal V16+ Project Upgrade Open in V16+, accept the upgrade prompt, re-target the CPU in the device view
TIA Portal V16+ TIA Portal V16+ Device Exchange Drag the new CPU over the old one in the device view, accept the address re-allocation
Firmware / catalog requirement: TIA Portal V13 does not list the 6CH04-0AB0 in the catalog. TIA Portal V14 SP1 with HSP 0168 or TIA Portal V16+ lists it natively. The same is true for the 6AH14-0AB0 in STEP 7 V5.4 SP5 or earlier.

10. Memory Budget Calculation

After downloading, the CPU's Module Information → Memory tab should show used memory ≤ 80 % of total, leaving headroom for cyclic instance-DB growth. Use the following formula to predict the load:

Load_Pct = (Sum_FB + Sum_FC + Sum_DB + Sum_OB + 32 KB system data) / WorkMemoryTotal * 100

Example for a 19.5 KB FB plus a 16 KB instance DB on a 6CG03 (96 KB total):

Load_Pct = (19.5 + 5 + 16 + 4 + 32) / 96 * 100 = 80.2 %

This is the threshold. Migration to the 6CH04 reduces the load to:

Load_Pct_6CH04 = (19.5 + 5 + 16 + 4 + 32) / 192 * 100 = 40.1 %

11. PROFIBUS Address Preservation

The PROFIBUS address of the CPU is configured in the hardware catalog (CPU properties → Interface → PROFIBUS DP). When swapping the CPU, verify:

  1. The new CPU's PROFIBUS address on X2 matches the old one (default 2 for the 314C-2DP master port, default 0 for the MPI/DP port).
  2. The transmission rate (default 1.5 Mbit/s) and the bus profile (DP) match.
  3. The slave GSD files for any DP slaves are still in the project. If the bus has ET 200S, ET 200M, or third-party slaves, their GSD files are required.
  4. The diagnostic repeater (if any) on the bus still matches the topology. The 6CH04-0AB0 supports the same diagnostic-buffer format as the 6CG03.

12. Diagnostic Buffer and Error Codes

When the download fails due to the 16,420-byte limit, the diagnostic buffer of the 6CG03 records one of the following entries:

Event ID Text Cause Action
0xE002 Block too long Offline block length > 16,420 bytes Reduce FB / FC size or migrate CPU
0xE003 Block not in load memory RAM full, MMC absent Insert MMC, free RAM, or migrate to larger CPU
0xE004 Error in block header Corrupt .s7p / .s7l file Re-compile, re-export from STEP 7
0xE005 Block ID invalid Wrong firmware signature Re-export the block, verify STEP 7 version
0xE101 Memory reset request Block length error forced stop MRES + cold restart after fixing block
0xE301 MMC missing / write-protected No MMC for V3.x firmware Insert ≥ 2 MB MMC, verify write-protect slider

The same event IDs apply to the 6CH04 / 6AH14 / 2AJ10; the meaning of "Block too long" changes to "Offline block length > 64 KB" on those CPUs.

13. Field-Commissioning Checklist

  • [ ] Inventory all SFB 41-49 calls in the project (SFB 41-49 inventory procedure, see section 4).
  • [ ] Verify the analog input type (0-10 V, ±10 V, 4-20 mA, RTD) and check the wiring against the connector pin-out in the manual.
  • [ ] Confirm the MMC is inserted and has at least 2 MB of free space.
  • [ ] Confirm the PROFIBUS address on the new CPU's X2 port matches the address of the old CPU.
  • [ ] Cold restart (OB 100) and verify that all retentive M, DB, and timer values are restored.
  • [ ] Run a full I/O force-table test to validate the new address map.
  • [ ] Trigger each technological function (HSC, FM, positioning, PWM) and verify the value in the instance DB.
  • [ ] Save the project archive to the customer network share and to a local MMC image backup.
  • [ ] Update the customer documentation: the new MLFB, the new firmware version, the new per-block limit, and the migration date.

14. Standards and Documentation References

15. Frequently Asked Questions

Why does FBD generate a larger FB than STL for the same logic?

FBD networks store both the input-condition mask and the rung-result in a temporary variable, doubling register pressure for bit-logic and conditional operations. The resulting MC7 stream is typically 1.4× to 2.4× larger than optimized STL, with a 1.5× to 1.8× average for a balanced program.

What is the maximum FB size on a 6ES7 314-6CG03-0AB0 CPU?

16,420 bytes, hard-coded by the on-CPU loader's 16-bit length field. The CPU rejects any block whose offline length exceeds this value with STEP 7 error W#16#7002 (block too long) during download. Diagnostic-buffer event ID is 0xE002.

Can I move my program from a 314C-2DP to a standard 315-2DP without modification?

Only if the program does not call SFB 41-49 (HSC, FM, positioning, PID, PWM). The standard CPU has no onboard I/O; the 24 DI / 16 DO / 5 AI / 2 AO wiring must be moved to SM 321 / SM 322 / SM 331 / SM 332 modules in the central rack or to an ET 200 station on PROFIBUS, and the I/O addresses must be re-allocated.

What is the cheapest drop-in replacement for the 314C-2DP that preserves the I/O map?

The 6ES7 314-6CH04-0AB0 (CPU 314C-2DP, V3.3). It has the same onboard I/O, the same technological functions, and raises the per-block ceiling from 16,420 bytes to 64 KB. Work memory doubles from 96 KB to 192 KB. The only hardware delta is the mandatory ≥ 2 MB MMC.

Do I need a new MMC for the 6CH04-0AB0?

Yes. The 6CH04 requires an MMC of at least 2 MB. A 512 KB MMC from the 6CG03 will trigger a "Cartridge missing" stop (diagnostic buffer event ID 0xE301). Order 6ES7 953-8LF00-0AA0 (2 MB) or 6ES7 953-8LG00-0AA0 (4 MB) for the replacement card.

Is the FB size limit a hard limit or a soft warning?

It is a hard limit enforced by the on-CPU loader. STEP 7 will refuse the download with error W#16#7002 and event ID 0xE002 in the diagnostic buffer. The only fix is to reduce the block size, split the block, or migrate the CPU.

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