Resolving PID_Compact V1.2 Missing Error in Siemens FB670

David Krause11 min read
PID ControlSiemensTroubleshooting
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Resolving PID_Compact V1.2 Missing Error in Siemens FB670

The Siemens HMI Faceplates library (entry ID 66839614) ships a ready-made PID control block — FB670 PIDCtrl — that integrates with PID_Compact (FB1130) on the S7-1200/S7-1500 PLC. When the project is compiled in TIA Portal, the compiler reports that FB1130 PID_Compact cannot be resolved, citing a missing block version (V1.2). The library block expects PID_Compact V1.2, but only V2.x is installed in the current TIA Portal installation. This article details the root cause, identification, and verified remedies for both S7-1200 and S7-1500 targets.

Symptom in one line: The TIA Portal compile log shows "FB1130 'PID_Compact' cannot be found in the program. The required version V1.2 is not installed." when compiling FB670 from the Faceplates library.

1. Affected Components and Versions

The Faceplates library 66839614 was issued for WinCC Comfort/Advanced and TIA Portal since TIA V13. The dependency on PID_Compact V1.2 is locked into the FB670 implementation. The following matrix describes the platforms and TIA Portal versions where the conflict occurs:

Target PLC TIA Portal Installed PID_Compact Available FB670 Expects Conflict
S7-1200 (CPU 121x/151x) V14 SP1 V2.0 V1.2 Yes
S7-1200 V15 / V15.1 V2.0 / V2.1 V1.2 Yes
S7-1200 V16 / V17 / V18 V2.2 / V3.x V1.2 Yes
S7-1500 (CPU 1500S/1500T) V14 SP1 or later V2.x or later V1.2 Yes — version rollback not supported on S7-1500

The Faceplates library entry is documented under Siemens Support Entry 66839614 — Faceplates for PID_Compact. The PID_Compact function block itself is documented at Siemens Support Entry 109769633 — PID_Compact Manual.

2. Root Cause — DB Tag Interface Divergence Between PID_Compact V1.2 and V2.x

PID_Compact was significantly restructured between V1.x and V2.x. The instance DB schema was redesigned to expose additional diagnostic information, an alarm structure, and integrated tuning views. FB670 (PIDCtrl) reads specific tag names from the PID_Compact instance DB — process value Input, setpoint Setpoint, output Output. In V2.x the underlying tag names were reorganized into nested substructures, so FB670's access paths no longer resolve.

The relevant differences can be summarized as:

Tag Category V1.2 (Expected by FB670) V2.x (Currently Installed)
Process value (scaled) Input (REAL) sPid_Calc.r_In
Setpoint Setpoint (REAL) sPid_Calc.r_Sp
Output (REAL %) Output (REAL) sPid_Calc.r_Out
Output PER (raw) OutputPER (INT) sPid_Calc.i_Out
Mode bits Mode (INT bitfield) sRet.i_Mode via Config.Mode
Cycle time Cycle (REAL seconds) Config.CycleTime

Because FB670's SCL source uses the V1.2 path names directly, the compiler cannot match them to the V2.x DB layout, producing either the missing-block error or "Tag not found" warnings depending on TIA Portal version. The library is published as compiled blocks with the V1.2 access map frozen at publication time.

Why the compiler says "missing": TIA Portal resolves cross-block references during the type-resolution phase. When the referenced FB is not present in any project library at the expected version, resolution fails and the entire FB670 instance is marked unresolved. The error message surfaces as "missing block" even though the block is technically present — at the wrong version.

3. Identifying the Error in the Compile Log

Open Inspector → "Info" tab → "Compile" after triggering a full project compile. Errors group under "Program blocks". Look for this signature:

Compile: Block FB670 "PIDCtrl"
  Error: The function block instance references a missing type.
         Required: FB1130 "PID_Compact" version V1.2
         Found in project libraries: FB1130 "PID_Compact" version V2.2
  Warning: Tag 'Input' cannot be resolved in instance DB 'PID_Compact_DB'.

Three confirmation checks before applying fixes:

  1. Open the Faceplates library 66839614 and right-click FB670 PIDCtrl → Properties → "Compile" tab → confirm the called FB number (FB1130) and version (V1.2).
  2. In the PLC tree, expand "Technology objects" (S7-1200) or "Program blocks → System blocks" (S7-1500) and confirm the loaded PID_Compact version.
  3. Open the existing PID_Compact instance DB and compare its data structure against the V1.2 reference in the TIA Portal help "PID_Compact — version history".

4. Resolution Path A — S7-1200 with Technology Object Version Down-Select

S7-1200 projects support down-selection of PID_Compact technology objects to V1.2 via the "Technology" task card. This is the cleanest remedy because it preserves the original FB670 source unchanged.

4.1 Prerequisites

  • TIA Portal V14 SP1 or V15.x installed — these versions still ship PID_Compact V1.2 in the global library.
  • CPU firmware that supports PID_Compact V1.2 — typically firmware V4.x for S7-1200. Refer to the Siemens Industry Online Support release notes for the specific CPU.
  • The Faceplates library 66839614 imported into the project (master copy or global library reference).

4.2 Step-by-Step

  1. Open the TIA Portal project containing the S7-1200 CPU.
  2. Switch to the "Technology" task card (right-hand sidebar).
  3. Expand "PID Control" → drag "PID_Compact" into the project tree.
  4. Right-click the new technology object → "Properties" → "Version selection".
  5. From the dropdown, choose V1.2 instead of the default latest version. If V1.2 is not listed, the TIA Portal installation does not ship it — see the verification note below.
  6. Confirm with OK. The technology object is added with the matching PID_Compact V1.2 FB.
  7. Recompile the project. The FB670 error should resolve.
Why this works only on S7-1200: The S7-1200 technology object was deliberately decoupled from the main PID_Compact FB version so older programs from TIA V13/V14 could still be opened and compiled on newer TIA Portal versions. S7-1500 did not retain this version-flex mechanism, which is why Path B is required for those CPUs.

4.3 Verification

  • Inspector → Compile: zero errors and zero warnings on FB670.
  • Cross-reference: select FB670 and confirm in Inspector → "Called blocks" that FB1130 (PID_Compact) V1.2 is referenced.
  • Download to the S7-1200 CPU. The faceplate must display the current process value, setpoint, and output without "###" placeholders.

5. Resolution Path B — S7-1500 SCL Source Modification

S7-1500 cannot down-select to PID_Compact V1.2 because that version was never released for the S7-1500 platform. The only durable solution is to replace the SCL source inside FB670 so it accesses the V2.x tag paths.

5.1 Prerequisites

  • Knowledge password for the library if FB670 ships as a compiled block — if you cannot edit it, regenerate the type. Alternatively, recreate the block as a user block.
  • Source archive of FB670 (SCL file) — often delivered alongside the Faceplates download as PIDCtrl_v1_2.scl or in the package archive.
  • A reference project with a working PID_Compact V2.2 instance DB to copy tag paths from.

5.2 Step-by-Step

  1. Open the Faceplates library 66839614 in the global library view.
  2. Right-click FB670 PIDCtrl → "Copy" with "Copy as SCL source".
  3. Right-click the PLC program blocks → "Add new SCL block" → paste as FB_PIDCtrl_V22.
  4. Open the new FB in the SCL editor.
  5. Find every reference to V1.2 tag names and replace per the table below.
  6. Adjust the block-call signature if the instance DB reference has moved (e.g., background DB now contains sPid_Calc substructure).
  7. Compile the FB. Resolve any remaining type mismatches.
  8. Update all HMI faceplate references pointing to the original FB670 to point at the new FB_PIDCtrl_V22.
  9. Recompile the project.

5.3 Tag-Path Replacement Reference

V1.2 Access (Old) V2.x Access (New) Data Type
i_DB.Input i_DB.sPid_Calc.r_In REAL
i_DB.Setpoint i_DB.sPid_Calc.r_Sp REAL
i_DB.Output i_DB.sPid_Calc.r_Out REAL
i_DB.OutputPER i_DB.sPid_Calc.i_Out INT
i_DB.Mode (input INT bitmask) i_DB.sRet.i_Mode DINT
i_DB.ActualMode i_DB.sRet.i_ActMode DINT
i_DB.Cycle i_DB.Config.CycleTime REAL
i_DB.Gain / TI / TD i_DB.Config.Gain / IntegralTime / DerivativeTime REAL

5.4 SCL Skeleton Example

FUNCTION_BLOCK FB_PIDCtrl_V22
VAR_INPUT
    i_Enable   : BOOL;
    i_Setpoint : REAL;
    i_PV       : REAL;
END_VAR
VAR_OUTPUT
    o_Output   : REAL;
END_VAR
VAR
    sPid       : REFERENCE TO FB1130;   // V2.x PID_Compact
END_VAR
BEGIN
    IF i_Enable THEN
        sPid.Setpoint := i_Setpoint;
        sPid.Input    := i_PV;
        sPid();        // call V2.x PID_Compact
        o_Output := sPid.Output;
    END_IF;
END_FUNCTION_BLOCK
Watch out: V2.x PID_Compact separates Input (scaled REAL) from Input_PER (raw INT from the analog input). FB670 expects the scaled REAL. If your analog value is raw, scale it in the calling OB before assigning to Input, or set Config.InputScaling.UpperPointIn and UpperPointOut accordingly.

6. Input and Output Scaling Reference

The Faceplates library expects default scaling ranges that match the standard analog I/O conventions on Siemens S7 systems. After either Path A or Path B, verify the scaling:

Signal Engineering Range Raw Range (INT) FB670 Default
Process value (Input) 0.0 to 100.0 % 0 to 27648 0.0 to 27648.0
Setpoint 0.0 to 100.0 % — 0.0 to 100.0
Output (REAL) 0.0 to 100.0 % — 0.0 to 100.0
OutputPER — 0 to 27648 n/a (drive via OutputPER)

If the FB670 SCL modification in Path B is used, the input and output limits retain the FB670 defaults (0.0 to 27648.0 input and 0.0 to 100.0 output). These are set inside FB670 and are independent of the PID_Compact internal scaling. This is acceptable when the faceplate scaling tags are configured to match.

7. Alternative — Migrate to a Current PID Faceplate

If the project is new or undergoing a major migration, replacing the legacy FB670 + WinCC Comfort faceplate with the current Siemens PID_Compact Faceplate shipped with TIA Portal V16+ is a cleaner path. The new faceplate is built against PID_Compact V2.x directly and avoids the version conflict entirely.

  1. Delete the legacy Faceplates library master copies from the project.
  2. Insert a new PID_Compact technology object (latest version).
  3. Drag the new faceplate from the WinCC library into the screen.
  4. Wire the faceplate tags to the new PID_Compact instance DB.
  5. Recompile and download.
Compatibility note for WinCC 7.2 / 7.3: If the SCADA system is WinCC 7.2 or 7.3 (not TIA-based WinCC), the original WinCC faceplate for FB670 must be sourced separately — typically from the WinCC add-on package. Confirm the faceplate graphics are still maintained in the add-on library revision compatible with your WinCC version.

8. Verification Checklist

Check Expected Result
Compile log — FB670 0 errors, 0 warnings
Cross-reference — FB670 called blocks FB1130 "PID_Compact" resolved at expected version
Online — PID_Compact instance DB Structure shows V2.x fields (sPid_Calc, Config, sRet)
Online — faceplate on HMI PV numeric field updates with process value; SP slider editable
Loop test — step SP from 30 % to 60 % Output ramps and stabilizes within tuned integral time
Watch table — Config.Gain, Config.IntegralTime Values loadable from faceplate "Tuning" view

9. Field-Proven Caveats

  • Knowledge-protected library blocks. If the imported FB670 is knowledge-protected, you cannot view or modify its SCL. In that case Path A (S7-1200 version down-select) is the only route. On S7-1500, request an unprotected source version of the block, or migrate to the new faceplate (Section 7).
  • DB instance numbering. After replacing FB670 with FB_PIDCtrl_V22, HMI tag references using symbolic names remain valid, but any absolute DB-number references (rare) must be updated.
  • Mode bits. The V1.2 Mode bit layout (manual / auto / pre-tune / fine-tune) is not 1:1 with V2.x. Confirm FB_PIDCtrl_V22 maps the operator's "Manual/Auto" button bits to the V2.x equivalent before commissioning.
  • Cycling. PID_Compact V2.x enforces a minimum cycle time of 0.1 s. If the OB1 cycle was set lower in V1.2, the controller internally clamps and reports a warning — check sPid_Calc.r_Cycle online.
  • Backwards compatibility for FB670 callers. Any other blocks (e.g., recipes, batch logic) that called FB670 symbolically remain valid; only the FB internals changed.

10. Diagnostic Reference Matrix

Symptom Likely Cause Action
Compile error: FB1130 V1.2 missing Wrong PID_Compact version installed Use Path A or Path B
Compile warning: "Tag 'Input' cannot be resolved" V1.2 paths used against V2.x DB Apply Path B tag-path replacements
Runtime: faceplate shows "###" HMI tag DB reference is broken Reconnect faceplate to new instance DB; re-compile HMI
Runtime: output stuck at 0 % or 100 % Mode not set to "Auto" or i_Mode bits mis-mapped Verify mode bit mapping; check Config.Mode
Runtime: PV field reads correctly but SP does not respond SP tag read-only or wrong DB Check faceplate tag connection for Setpoint
Runtime: tuning view does not open New PID_Compact V2.x tuning DB not present Generate tuning DB (PID_Compact → Commissioning → Tuning)
Compile error on S7-1500: V1.2 not selectable V1.2 was never released for S7-1500 Apply Path B (SCL modification)

Frequently Asked Questions

Why does FB670 only work with PID_Compact V1.2?

The Faceplates library 66839614 was compiled against the V1.2 instance DB schema. PID_Compact V2.x restructured the DB (introducing sPid_Calc, Config, and sRet substructures), so the V1.2 path names no longer resolve. Either downgrade the S7-1200 PID_Compact to V1.2 (Path A) or edit the FB670 SCL source to use the V2.x paths (Path B).

Can I install PID_Compact V1.2 alongside V2.x on the same TIA Portal?

Yes, on S7-1200 only. The technology object version selector allows multiple versions to coexist in different technology objects within the same project. On S7-1500 the V1.2 PID_Compact was never released, so version coexistence is not possible.

What input and output limits does FB670 use by default?

FB670 defaults to 0.0 to 27648.0 for the scaled input and 0.0 to 100.0 for the output percentage. These are hard-coded inside the FB670 source and are not overridden by PID_Compact scaling. Confirm in the faceplate configuration that the same ranges are used for tag scaling on the HMI.

My project uses WinCC 7.2/7.3 — how do I get a faceplate for FB670?

The classic WinCC faceplates for FB670 ship as part of the WinCC add-on package (separate from the TIA Portal Faceplates library). Verify the add-on revision matches your WinCC version (7.2 or 7.3) and import the .pdl graphics. The add-on documentation references the same FB670 contract.

Is there a simpler migration than modifying FB670 SCL?

Yes — replace the legacy Faceplates library with the current PID_Compact faceplate available in TIA Portal V16 or later. The new faceplate is built against PID_Compact V2.x and avoids the version conflict, but it requires new screen graphics and tag wiring.

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