S7-1200 HSC Without Hardware Interrupt: Cyclic OB Winder Solution

David Krause12 min read
S7-1200SiemensTechnical Reference
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Overview

Counting at high rates on a SIMATIC S7-1200 typically maps the high-speed counter (HSC) event "CV = reference value" to a hardware interrupt OB (OB40 by default). This is the textbook approach for fixed batch lengths where the counter runs to completion and is rearmed. It breaks down when the process must reset the counter mid-run, change the preset value (PV) on the fly, and ramp a drive down before PV is reached. The HSC block must live in a context that the user program can control continuously — a cyclic OB.

This reference documents a working implementation for a reel winder running on an S7-1214 DC/DC/DC: ~5,000 pulses/min product count, analog diameter sensor, loadcell tension feedback, and a two-stage ramp-down (½ speed at PV-100, crawl speed 10 m/min at PV-10, stop at PV). The architecture is generic and applies to any S7-1200/1500 HSC application that needs a resettable counter with deterministic pre-stop behaviour.

Prerequisites

Item Specification
CPU S7-1214 DC/DC/DC (Firmware V4.2 or later recommended)
Engineering STEP 7 Basic / TIA Portal V15.1 or later
Signal 24 V HTL encoder or proximity switch on HSC-capable input (I0.0–I0.5 on 1214)
Max count rate 100 kHz single-phase, 80 kHz quadrature (CPU 1214)
Application rate 5,000 pulses/min = 83.3 Hz — well within HSC limits
Drive SINAMICS V20 or V90 controlled by PTO/PWM or analog output (HSC does not drive the motor directly)
Count rate check: 5,000 pulses/min = 83.3 Hz = 12 ms period. The HSC hardware samples the input synchronously with the CPU — cyclic OB execution time (typically 1–10 ms in OB1) does not gate the counting. The user's 30 ms compare cycle is also safe because 30 ms < 12 ms would risk missed transitions, but 30 ms ≫ 12 ms here, giving a 2.5× margin.

HSC Hardware Configuration in TIA Portal

Configure the HSC under Device configuration > Properties > High Speed Counters (HSC):

  1. Select the HSC channel (HSC1–HSC6 depending on CPU).
  2. Set Type of counting to Count internal if using a single-phase pulse train from a proximity or encoder A track.
  3. Set Counting direction to User program controlled if reversing is possible, or Single phase up for unidirectional winder counting.
  4. Set Initial counter value = 0.
  5. Set Initial reference value (the PV) to the desired roll length in counts.
  6. Under Event configuration, attach a hardware interrupt OB to the Counter value equals reference value event. For this architecture, attach OB40 anyway — it is not used for the stop logic but is kept available for diagnostics. The actual comparison runs in the cyclic OB.
  7. Set Input filter on the digital input. The default "6.4 ms" filter is the trap on high-speed applications — change to "0.8 µs" or "none" for encoder input. See the input filter section below.

Why OB40 Alone Fails for Resettable Counters

The HSC hardware interrupt is edge-triggered: OB40 fires once when CV transitions to the configured reference value. After it fires, the HSC is automatically gated and the OB does not re-execute until the count is reset and rearmed. If the operator needs to:

  • Manually reset CV to 0 before PV is reached (e.g., reject a partial roll)
  • Edit PV while the counter is running (change roll length for a different product)
  • Trigger a controlled ramp-down rather than an immediate stop at PV

then OB40 is the wrong place to host the decision logic. The user program never gets a chance to override the comparison. The fix is to leave the HSC counting freely and to perform the comparison in a cyclic OB where the user has full read/write access to the HSC instance DB, the reference value, and the drive enable.

Cyclic OB Architecture

The HSC count value is mirrored to a global data block (DB) by the HSC instruction. A cyclic OB (OB1 main scan, or a dedicated cyclic interrupt OB such as OB30) reads the mirrored CV, compares it to PV, and stages the drive command. Two interrupt OBs are in play:

OB Purpose Priority
OB1 (or OB30 cyclic interrupt) Compare CV vs. PV, drive ramp-down state machine, manual reset logic, new PV write 1 (lowest)
OB40 (hardware interrupt) Optional diagnostics / safety-only reaction; not used for stop logic 16 (configurable 2–26)
Why OB30 (cyclic interrupt) is preferable to OB1: OB30 guarantees a deterministic 5–600 ms execution period regardless of OB1 program length. For a 5,000 pulse/min application a 10 ms OB30 gives 5.4× oversampling on the 12 ms pulse period, leaving headroom for ramp-down staging without jitter.

HSC Instruction Placement and CTRL_HSC_EXT

Call the CTRL_HSC (or CTRL_HSC_EXT on firmware V4.x) instruction in OB1 or OB30. The instance DB (e.g., HSC1_DB) must be called continuously so that the NewCV, NewRV, and NewPeriod inputs are sampled every scan. Use CTRL_HSC_EXT if you need to update the reference value while the HSC is running — CTRL_HSC has a smaller footprint but only writes RV on the first call after a reset.

// OB30 — HSC control + compare state machine
// Instance: "HSC1_DB" of type HSC_Count (CTRL_HSC_EXT)

// Inputs from HMI / recipe
i_NewRV      : INT;   // New reference value (PV) from operator
i_Reset      : BOOL;  // Manual reset pushbutton
i_ProductType: INT;   // 1, 2, 3... selects ramp profile

// Outputs to drive / HMI
q_CV         : INT;   // Mirror of current count for HMI
q_DriveSpd   : REAL;  // 0.0 .. 1.0 normalized speed reference
q_StopProces : BOOL;  // Triggers cycle stop in SFC / sequence

// Local
CV_act       : INT;   // Snapshot of HSC.CV
PV           : INT;   // Active PV
ramp_offset  : INT;   // Counts before PV to begin ramp

IF i_Reset THEN HSC1_DB.NewCV := 0; // Reset CV to 0 HSC1_DB.CV := 0; HSC1_DB.NewRV := i_NewRV; // Latch new PV PV := i_NewRV; ramp_offset := 0; q_StopProces := FALSE; END_IF;

// Read live count CV_act := HSC1_DB.CV; q_CV := CV_act;

// Two-stage ramp-down state machine IF i_ProductType = 1 THEN IF CV_act >= PV - 10 THEN q_DriveSpd := 10.0 / 120.0; // 10 m/min crawl ELSIF CV_act >= PV - 100 THEN q_DriveSpd := 0.5; // ½ speed ELSE q_DriveSpd := 1.0; // Full speed (120 m/min) END_IF; END_IF;

// Stop trigger — fires when CV reaches PV IF CV_act >= PV THEN q_StopProces := TRUE; q_DriveSpd := 0.0; END_IF;

// Always re-arm HSC with last NewRV HSC1_DB.NewRV := PV;

Two-Stage Ramp-Down State Machine

Ramp-Down State Machine (S7-1214 winder, product type 1) RUN_FULL120 m/min RUN_HALF60 m/min @ PV-100 RUN_CRAWL10 m/min @ PV-10 STOPCV >= PV MANUAL_RESETCV := 0; NewRV Reset btn CV >= PV - 100 → RUN_HALF CV >= PV - 10 → RUN_CRAWL

The two intermediate speeds (½ and 10 m/min) absorb the mechanical lag between when the speed command changes and when the web actually decelerates. A single hard stop at PV typically overshoots by 10–30 counts on a 120 m/min line; the two-stage approach holds overshoot to 1–5 counts in the field implementation.

Input Filter Configuration (the >40 m/min Bug)

The most common commissioning failure on a S7-1200 HSC is leaving the digital input filter at its default "6.4 ms". At 120 m/min with 1 count/product, the period is shorter than the filter window, so the input is suppressed. Symptom: counts start at low speed, drop to zero above ~40 m/min. Fix:

  1. Open Device configuration > Digital inputs > channel.
  2. Change Input filter from "6.4 ms" to the fastest band that still rejects contact bounce. For an HTL encoder with clean square wave, use "0.8 µs" or "none". For a mechanical proximity, "0.1 ms" is a safer compromise.
Filter setting Min pulse width detected Max pulse rate Use for
6.4 ms (default) 6.4 ms ~78 Hz Mechanical switches, slow signals
3.2 ms 3.2 ms ~156 Hz Reject contact bounce
0.8 ms 0.8 ms ~625 Hz Fast photoeyes, low-resolution encoders
0.1 ms 0.1 ms 5 kHz Incremental encoders
None / 0.8 µs CPU scan (≥1 µs) 100 kHz HSC hardware, high-resolution encoders
Rule of thumb: filter time must be ≤ (1 / (2 × max_pulse_rate)) for reliable detection. For 5,000 pulses/min = 83.3 Hz, any setting above "0.8 ms" is mechanically safe but the default "6.4 ms" is not — and is the most common field mistake.

Winder Speed and Tension Tuning

Without a nip roller, web speed is derived from the instantaneous roll diameter measured by an analog ultrasonic or laser sensor. The diameter value feeds a line-speed calculation:

v_web [m/min] = π × D_core [m] × RPM_core
RPM_core     = ω_motor / N_gearbox

With measured values on the working unit:

Parameter Value
Setpoint line speed 120 m/min
Measured line speed deviation ±1 m/min (0.83%)
Core diameter (empty) 76 mm
Full roll diameter 300 mm
Tension setpoint 10 N (loadcell rated 50 N)
Tension deviation ±10 N at start (improved to ±2 N with extended web length)
Web correction length 1.0 m (path from unwind to rewind)

For tighter tension control add a nip roller and a second loadcell: the nip roller isolates tension from speed, and the second loadcell provides differential feedback. The two-loop arrangement (tension outer, speed inner) typically holds ±0.5 N regardless of diameter change.

HSC Event Configuration Reference

Per the SIMATIC S7-1200 manual, three HSC events can each be mapped to a hardware interrupt OB with priority 2–26:

Event Trigger condition Recommended use
CV = reference value Count value transitions to RV Diagnostics, latched alarms; not for the stop logic in this architecture
Synchronization Sync input rising edge External homing or index reset from a second sensor
Change of direction Up/Down bit changes Detect direction reversal on bidirectional winders

The reference value itself can be set at configuration time (Initial reference value) or updated at runtime via the NewReference1 input on CTRL_HSC_EXT — the same input used in the cyclic OB example above to accept a new PV from the HMI without resetting the count.

Verification and Commissioning

  1. Input filter test: Force a known pulse train (function generator or hand-cranked encoder with oscilloscope) and confirm counts increment in the HSC instance DB online monitor.
  2. Compare latency test: Set a low PV (e.g., 50 counts) and run the line. Stopwatch the time from PV-100 to PV and compare against the OB30 period × (100 / counts_per_period). Expectation: latency ≤ 2 × OB30 period.
  3. Reset test: With the line running, press the manual reset. Confirm CV returns to 0 within one OB30 cycle and the next PV is latched into NewRV.
  4. PV change test: Edit PV on the HMI during a run. Confirm the compare thresholds (PV-100, PV-10) shift in the same scan.
  5. Overshoot measurement: Run 20 rolls of the same product and log CV at the stop instant. Expectation: 1–5 counts overshoot; if > 10, tighten the PV-10 offset.
  6. Tension test: With a 5 kg pretension weight, log loadcell N values over a full roll. Expectation: 8–12 N on a 10 N setpoint; drift > 20 N indicates the web correction length is too short for the diameter ratio.

Troubleshooting Matrix

Symptom Likely cause Action
Counts zero above 40 m/min, count normally below Input filter default 6.4 ms suppressing pulses Change input filter to 0.8 µs or 0.1 ms in device config
OB40 fires but CV cannot be reset Reset logic placed inside the hardware interrupt OB Move reset and PV write to cyclic OB; keep OB40 for diagnostics only
CV never reaches PV PV written once and never re-armed Re-assign HSC1_DB.NewRV := PV every OB30 scan
Stop is immediate, no ramp Compare logic only checks CV = PV, not CV >= PV - 10 Add intermediate thresholds; map each to a speed setpoint
Overshoot > 10 counts PV-10 offset too small for current web speed Lower the crawl-speed threshold offset (e.g., PV-15) or add a third stage at PV-30
Speed oscillates, tension spikes No nip roller; loadcell correction path too short Increase web correction length to 2 m or add a second loadcell + nip roller
New PV not taking effect at runtime Using CTRL_HSC instead of CTRL_HSC_EXT Switch to CTRL_HSC_EXT and write NewReference1 continuously

Field-Proven Outcomes

On the S7-1214 winder described, the cyclic-OB architecture with the two-stage ramp-down state machine produced:

  • 1–5 count overshoot per roll (matches the physical product count tolerance from the upstream process)
  • ±1 m/min line speed deviation from 120 m/min setpoint
  • ±10 N tension deviation (later tightened to ±2 N with extended web length)
  • Full HMI control of CV reset and PV edit during the run, with the HSC instruction providing the count determinism of the hardware path

For new designs the recommended next step is a nip-roller + two-loadcell configuration. The HSC and compare logic from this article remain unchanged — only the mechanical isolation of the tension loop improves.

FAQ

Can the S7-1200 HSC count above 5,000 pulses/min in a cyclic OB?

Yes. The HSC hardware samples the input independently of OB1 or OB30 execution. Cyclic OB at 30 ms can supervise any HSC rate up to the CPU's 100 kHz single-phase limit. The cyclic OB only reads the mirrored CV; it does not gate counting.

Why does OB40 not let me reset the counter mid-run?

OB40 fires once when CV transitions to RV and the HSC auto-disarms. The user has no scan context before that transition to write NewCV or NewRV. Resetting from inside OB40 only works on the edge of the next valid count cycle, which defeats manual reset. The standard solution is to move reset and PV editing to a cyclic OB that polls the HSC every scan.

What input filter setting is required for HSC counting?

Use the fastest band that still rejects contact bounce. For an HTL encoder, "0.8 µs" or "none" is appropriate. The default "6.4 ms" suppresses anything above ~78 Hz and is the most common field reason for "counts stop above 40 m/min" symptoms on a winder.

Should I use CTRL_HSC or CTRL_HSC_EXT for a resettable counter?

Use CTRL_HSC_EXT (firmware V4.x and later) when the operator changes PV at runtime. CTRL_HSC only writes the reference value on the first call after reset; CTRL_HSC_EXT continuously samples NewReference1 and NewPeriod, matching the cyclic-OB pattern shown in the sample code above.

What HSC event priorities should I configure in TIA Portal?

Set the hardware interrupt OB priority in the range 2–26 with 26 highest. If OB40 is kept for diagnostics only, assign a low priority (e.g., 16) so it cannot preempt OB30. The cyclic OB that owns the compare logic and drive commands must always run at a lower numerical priority than any safety-related interrupt.

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