Siemens IP 242 Counter Module 6ES5-242 Technical Reference

The Siemens IP 242 counter module (order number family 6ES5 242-...) is a high-speed counter (HSC) intelligent module for the SIMATIC S5 PLC family. It plugs into any S5 central rack or expansion rack slot and provides hardware-assisted counting, measurement, and position-decoding functions that exceed the cycle-time capabilities of the CPU. This reference consolidates the operating information for the IP 242A and IP 242B variants, identifies the official Siemens documentation entry IDs, and provides a field-ready configuration matrix for engineers maintaining legacy S5 installations.

1. Module Identification and Variants

The IP 242 family is delivered under multiple MLFB (Maschinenlesbare Fabrikatebezeichnung) order numbers. The most common references in field service are:

The "A" suffix designates the IP 242A counter module; the "B" suffix designates the IP 242B, which adds additional operating modes and a richer Function Block (FB) library. Both modules share the front-panel connector footprint but require different FBs on the CPU side.

2. Official Siemens Documentation

The authoritative source for the IP 242 is the S5 Equipment Manual for the counter module, published under Siemens entry ID 6ES5 998-0KM21. This manual covers the IP 242A and IP 242B in a single volume (~400 pages) and is the only document that includes:

• Hardware and software setup procedures for both variants
• High-speed counter programming guidelines
• Commissioning (startup) procedures
• Sample programs for each counter type
• Descriptions of all operating modes

Two Siemens support entry IDs are directly associated with the IP 242:

• S5 Equipment Manual: Counter Module IP 242A / IP 242B (PDF, 6ES5 998-0KM21)
• Siemens Support Entry 1086302 - IP 242A/B Documentation Index
• Siemens Support Entry 7879768 - S5 Module Documentation Archive

Engineers should always download the PDF directly from the Siemens Industry Online Support portal to ensure revision currency; printed manuals discovered at customer sites are frequently superseded.

3. Hardware Specifications

4. Operating Modes

The IP 242A and IP 242B each support several operating modes, selected by hardware DIP switches on the module front panel and parameterised through the FBs in the S5 user program. The principal modes are:

4.1 Continuous Counting

The counter increments or decrements on each valid input pulse and is read cyclically by the CPU through the FB interface. The 24-bit internal register wraps at full scale unless an explicit comparison value is loaded.

4.2 Single Counting with Gate Control

A hardware gate (typically wired from a sensor or output) enables and disables the counting process. The FB reads the gate state to determine whether the current count value is valid.

4.3 Periodic Counting

Used for measuring rotational or flow rates; the counter is gated by a fixed time window generated either internally on the module or externally via a hardware timer.

4.4 Comparison / Output Trigger (IP 242B enhanced)

A pre-loaded comparison value triggers one of the two digital outputs on the IP 242 when the counter reaches the setpoint. The IP 242B offers multiple comparison windows versus the IP 242A's single comparison per channel.

4.5 Position Decode / Measurement Mode

Quadrature decoding of incremental encoder A/B tracks with optional zero reference. The module performs the quadrature multiplication in hardware, freeing the S5 CPU from interrupt-driven pulse counting.

5. Hardware Configuration (DIP Switches)

Before applying power, configure the operating mode and signal level via the on-board DIP switch block. Switch assignment for the IP 242 family:

6. Function Block (FB) Library

The IP 242 does not expose a standard PII/PIQ byte image. Communication with the CPU is mediated by Function Blocks loaded into the S5 user program:

The FBs exchange data with the module through a parameter area in the CPU. The exact parameter structure (DX / DW) is documented in Section 5 of 6ES5 998-0KM21. A typical parameter load sequence is:

1. CPU restart (OB 21 cold restart, OB 22 warm restart) calls the IP 242 initialisation FB.
2. The initialisation FB transfers the operating mode and comparison values from a configured DB to the module.
3. In cyclic OB 1 execution, a read FB fetches the current count and status; a write FB updates comparison setpoints as required.
4. Comparison events raise the module interrupt output, which the FB converts to a flag or process input for the application.

7. Typical Parameter Block Layout

The following is a representative parameter data block layout for the IP 242B. Confirm exact byte offsets against the equipment manual for the FB version in use.

8. Wiring and Front Connector Pinout

The 40-pin front connector carries encoder signals, gate inputs, and the comparison outputs. The pinout varies between IP 242A and IP 242B revisions; always cross-check the wiring diagram printed on the inside of the front-panel door against the equipment manual before commissioning. Typical signal groups:

• Pins 1-8: Encoder 1 input (A, /A, B, /B, N, /N, 24 V supply, 0 V supply) for RS-422 variants
• Pins 9-12: Encoder 1 digital inputs (gate, set, reset)
• Pins 13-20: Encoder 2 input group
• Pins 21-24: Encoder 2 gate / set / reset inputs
• Pins 25-30: Comparison outputs 1 and 2
• Pins 31-40: Reserved / shield ground

For 24 V single-ended encoders, the differential pairs (e.g. /A) are unused and the corresponding pin must be tied to the reference voltage per the module documentation.

9. Commissioning Procedure

1. Verify compatibility. Confirm the target CPU firmware supports the FB library version. Older S5-90U and S5-95U CPUs may not host the IP 242B FB set.
2. Set DIP switches for the encoder type, counting direction, and gate source per the equipment manual matrix.
3. Power down the rack, install the IP 242 in a free slot, and apply power.
4. Load the FB library into the S5 program file using STEP 5 (or S5-DOS / S5 for Windows in legacy support scenarios).
5. Configure the parameter DB with slot, mode, and comparison values.
6. Call the initialisation FB in OB 21 (cold restart) and verify the module status LED transitions to "RUN" or equivalent.
7. Wire the encoder and apply a known input (hand-crank or signal generator). Monitor the read-back count in a VAT table.
8. Tune the comparison setpoint and verify the digital output toggles on the expected count value.
9. Force-stop and test gate behavior by toggling the hardware gate input; confirm the FB status bits reflect the gate state.

10. Troubleshooting Matrix

11. Migration Considerations

For facilities planning to replace S5 lines with S7-1500, the modern functional equivalent is the SIMATIC TM Count 2x24V module (6ES7 138-6AA00-0BA0) or the integrated high-speed counter functionality of the S7-1500 CPU / ET 200MP. The TM Count module supports incremental encoders up to 1 MHz, hardware comparison, and PROFINET-based diagnostics that exceed the IP 242 capability. Plan migration around:

• Signal level: confirm 24 V push-pull or RS-422 compatibility with the field wiring
• Cycle time: S7-1500 application cycle is typically faster than S5 OB 1
• Function block replacement: the TM Count is configured via the TIA Portal, not hand-written FBs

12. Field-Engineering Checklist

• Confirm the exact MLFB on the module side label before consulting the manual; the IP 242A and IP 242B have different FB sets.
• Download the equipment manual from the Siemens Industry Online Support portal using the entry IDs above; printed copies at customer sites are often out of revision.
• Archive the FB source files alongside the program backup; rebuilding the FBs from documentation is non-trivial and error-prone.
• Log module serial number and firmware stamp in the maintenance system; the IP 242B firmware version affects supported operating modes.
• Verify front-connector wiring against the door label at every recommissioning; pinout drift between revisions is a common source of field faults.