Siemens SM331 6ES7331-1KF02 Conversion Time for PID Sample Time

David Krause18 min read
S7-300SiemensTechnical Reference
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Siemens SM331 6ES7331-1KF02 Conversion Time for PID Sample Time

The Siemens SIMATIC S7-300 SM 331 analog input module, order number 6ES7 331-1KF02-0AB0, is one of the most widely deployed AI modules in S7-300 plants. In closed-loop control — particularly pressure loops with sub-second time constants — the analog-to-digital conversion time of the AI module directly limits the achievable PID sample time. This reference explains how the 1KF02 conversion time is specified, how it interacts with the SFB41/FB41 PID block cycle, and how to choose the correct SM331 variant (for example 6ES7 331-7HF01-0AB0) when 65 ms is too slow for the process.

1. The Core Engineering Problem

A PID controller running on an S7-300 CPU reads the process variable (PV) from an analog input module. If the analog-to-digital conversion completes in 65 ms and the PID cycle (OB35) is set to 20 ms, the controller executes the same PID calculation three to four times on the same "stale" PV value before a new value is available. The effective sample time of the closed loop is the longer of the two — not the shorter.

Three consequences follow:

  1. Loop bandwidth collapses. A 20 ms PID cycle implies a theoretical closed-loop bandwidth of 1 / (2·π·Ts) ≈ 8 Hz; a 65 ms effective sample time drops this to 2.5 Hz.
  2. Aliasing of high-frequency disturbances. Any process noise above the Nyquist frequency (1 / (2·Ts) ≈ 7.7 Hz at 65 ms) folds back into the control band and is amplified by the derivative term.
  3. Setpoint tracking is sluggish. The zero-order hold of the AI introduces a half-sample delay of about 32 ms in the forward path, eating phase margin.
Rule of thumb: PID cycle time ≥ AI cycle time. If the AI takes 65 ms to convert, the PID must not be called more often than every 65 ms — no matter what OB35 is set to.

2. SM331 Module Family at a Glance

The SM331 family is built around a common hardware platform with different resolution, conversion time, and feature sets. The variants most relevant to closed-loop control are listed in the table below. The Siemens product catalog on the Siemens Industry Online Support portal is the authoritative source for the latest MLFB revisions and supported measurement ranges.

SM331 analog input variants for S7-300
MLFB (Order No.) Description Resolution Channels Basic conv. time / channel 0–10 V support Notes
6ES7 331-1KF02-0AB0 SM 331 AI 8 x 13 Bit 13 bit + sign 8 2.5 / 16.67 / 20 / 100 ms (configurable) Yes (per group) General purpose; configurable interference suppression
6ES7 331-7HF01-0AB0 SM 331 AI 8 x 14 Bit, high-speed 14 bit + sign 8 0.4 ms Yes (verify catalog) Preferred for fast PID loops; hardware jumper for V/I
6ES7 331-7HF00-0AB0 SM 331 AI 8 x 14 Bit, high-speed 14 bit + sign 8 0.4 ms Limited Earlier revision of the 7HF family; bipolar only in some ranges
6ES7 331-7PF01-0AB0 SM 331 AI 8 x 16 Bit 16 bit + sign 8 10 / 16.67 / 20 / 100 ms Yes High resolution, slower; for precise measurement
6ES7 331-7PF11-0AB0 SM 331 AI 8 x 16 Bit (later rev.) 16 bit + sign 8 10 / 16.67 / 20 / 100 ms Yes Successor of 7PF01
6ES7 331-1KF01-0AB0 SM 331 AI 8 x 13 Bit (older) 13 bit + sign 8 0.4 ms basic Yes Discontinued predecessor; check used-stock availability

For a fast pressure control loop with a 0–10 V transmitter, the practical choice is 6ES7 331-7HF01-0AB0. The user must verify 0–10 V support in the specific MLFB revision via the Siemens Industry Online Support catalog before ordering. The 6ES7 331-1KF02-0AB0 remains a valid option when the loop time constant is greater than 500 ms.

3. 6ES7 331-1KF02-0AB0 Conversion Time Specification

The 1KF02 uses a sigma-delta ADC with selectable integration time. The integration time has a dual purpose:

  1. It sets the conversion time per channel (= integration time).
  2. It selects the mains interference suppression frequency (1 / integration time).
1KF02 integration time vs interference suppression
Interference suppression Integration time / channel Cycle for 8 channels (worst case) Cycle for 4 channels Use case
400 Hz 2.5 ms 20 ms 10 ms Fast loops; mains noise already filtered upstream
60 Hz 16.67 ms 133 ms ~67 ms North American 60 Hz mains
50 Hz 20 ms 160 ms 80 ms European 50 Hz mains; standard setting
10 Hz 100 ms 800 ms 400 ms Severe mains noise; slow measurement only

The integration time is set per channel group in the STEP 7 hardware configuration (HW Config). Two adjacent channels share one integration time setting because they share the same ADC channel group. The 1KF02 has four channel groups (channels 0/1, 2/3, 4/5, 6/7).

3.1 Where the 65 ms Figure Comes From

The "65 ms" value cited in many field reports does not match any standard 1KF02 cycle time for a fully populated 8-channel scan. The most likely explanations are:

  • Only 4 channels active at 60 Hz integration: 4 × 16.67 ms ≈ 67 ms (close to 65).
  • 8 channels active at 50 Hz with a non-default channel group scan ordering.
  • The SFB read-back of "actual cycle time," which includes program execution and PROFIBUS update overhead.
  • A misreading of the "integration time" field as the "cycle time."

To verify the real cycle time on the running system, use the Siemens Industry Online Support diagnostics or a STEP 7 watch table on the AI channel raw value. Log the timestamp between successive updates — that interval is the effective cycle time.

4. The ±10 V vs 0–10 V Resolution Trade-off

Many engineers use a 0–10 V transmitter but configure the SM331 for the ±10 V bipolar range. This costs one bit of effective resolution because only half the ADC range is exercised. The 1KF02 has 13-bit resolution (12 bit + sign for bipolar ranges, 13 bit for unipolar).

Resolution in mV per LSB
Module Range set Full scale Bits LSB (mV) Effective bits at 0–10 V
1KF02 0–10 V 10 V 13 1.22 mV 13
1KF02 ±10 V 20 V 12 + sign 4.88 mV ~11.4 (half range)
7HF01 0–10 V 10 V 14 0.61 mV 14
7HF01 ±10 V 20 V 13 + sign 2.44 mV ~12.4

Always configure the SM331 measurement range to match the transmitter: a 0–10 V transmitter on a 0–10 V range, a 4–20 mA transmitter on a 4–20 mA range. Avoid the ±10 V bipolar range for unipolar signals.

Hardware jumper check: On the 6ES7 331-7HF01-0AB0, the voltage/current mode is selected by a hardware jumper on the module side. A wrong jumper combined with a software range mismatch can produce hard over-range values or wire-break diagnostics that mask the real process signal. Always re-verify the jumper after a module replacement.

5. PID Sample Time Theory: Nyquist, Time Constants, Anti-Aliasing

Three rules govern the relationship between conversion time, sample time, and closed-loop stability.

5.1 Shannon–Nyquist sampling

The sample frequency fs must be at least twice the highest process frequency fmax that the controller must track or reject:

fs ≥ 2 · fmax    (Nyquist–Shannon)

A pressure loop with a dominant time constant τ of 100 ms has a corner frequency fmax = 1 / (2·π·τ) ≈ 1.6 Hz. The minimum sample rate is therefore 3.2 Hz, i.e. Ts ≤ 313 ms. Practical engineering uses a 5× to 10× margin above Nyquist to limit aliasing, so Ts should be 30 ms to 60 ms for that loop.

5.2 Time-constant rule

A widely used empirical rule for digital control:

Ts ≤ τ_d / 10

where τ_d is the dominant closed-loop time constant you want to control. For τ_d = 100 ms, Ts ≤ 10 ms — which the 1KF02 can only deliver at the 400 Hz integration setting with reduced mains noise rejection.

5.3 The phase-lag cost of sample-and-hold

A zero-order hold introduces a half-sample delay of 0.5·Ts in the forward path. The additional phase lag at frequency ω is:

φ_zoh(ω) = −0.5 · Ts · ω · (180/π)    [degrees]

For Ts = 65 ms at ω = 10 rad/s, φ_zoh ≈ −18.6°. For Ts = 3.2 ms (7HF01, 8 channels), φ_zoh ≈ −0.9°. The slow AI erases nearly 20° of phase margin at modest bandwidth — usually the difference between stable and marginally stable tuning.

5.4 Anti-aliasing

The SM331 input filter is a first-order RC with a cut-off around 1 kHz. At Ts = 65 ms (fs ≈ 15 Hz), any process noise above 7.5 Hz folds back into the control band. Add a low-pass filter at the transmitter, at the AI terminal, or in software (FC106 moving average) when the 1KF02 conversion time cannot be reduced.

6. Pressure Loop Dynamics

Pressure control spans four orders of magnitude in time constant, depending on the medium and geometry:

Typical pressure-loop time constants
Process Typical τ Required PID sample time
Hydraulic cylinder, small volume (V < 1 L) 5 – 30 ms ≤ 5 ms
Hydraulic cylinder, medium volume (1 – 10 L) 30 – 200 ms 5 – 20 ms
Pneumatic actuator, short line 100 – 500 ms 10 – 50 ms
Pneumatic, long line / large volume 500 ms – 5 s 50 – 500 ms
Liquid process line, slow 1 s – 1 min 100 ms – 10 s

For a "fast pressure control" with a hydraulic or short-pneumatic loop, the 1KF02 with 65 ms effective cycle is one to two decades too slow. The 6ES7 331-7HF01-0AB0 (0.4 ms per channel) is the right starting point.

7. STEP 7 Configuration: Hardware and Cyclic Interrupt

  1. Open SIMATIC Manager → your S7 project → HW Config.
  2. Locate the 1KF02 (or 7HF01) in slot 4–11 of the S7-300 rack.
  3. Double-click the module → "Inputs" tab.
  4. For each channel group, select the correct measurement type (voltage, current, RTD, TC).
  5. For voltage/current, select the exact range: 0–10 V for a 0–10 V transmitter, not ±10 V.
  6. Set the integration time:
    • 50 Hz for European 50 Hz mains; gives 20 ms per channel.
    • 60 Hz for North American 60 Hz mains; gives 16.67 ms per channel.
    • 400 Hz for fast loops where mains noise is already filtered upstream; gives 2.5 ms per channel.
  7. Enable "Diagnostics" if you want overflow / wire-break bits.
  8. Save and recompile (Station → Save and Compile).
  9. Download HW Config to the CPU (target system → download).
  10. Open the CPU properties → "Cyclic Interrupts" tab. Set OB35 to a value ≥ the AI cycle time. For a fully populated 1KF02 at 50 Hz, OB35 should be 160 ms or greater.

Reference: see the "S7-300 Module Data" manual on the Siemens Industry Online Support portal for the complete parameter list of the 1KF02 and 7HF01.

8. Sample Code: SFB41 / FB41 PID with Scaled AI Input

The 6ES7 331-1KF02-0AB0 returns a 16-bit integer (0 to 27648 nominal for unipolar 0–10 V). The FC105 "SCALE" function block converts the integer to a real engineering value, which is then passed to SFB41 "CONT_C" as the process variable. SFB41/42/43 are documented in the "Standard PID Control" manual on the Siemens Industry Online Support portal.

8.1 STL: OB35 calling FC105 + SFB41

// OB35 - Cyclic interrupt
// AI: PIW 288 (channel 0 of 1KF02 in slot 4)
// AO: PQW 288 (channel 0 of AO module)

CALL  FC 105
  IN       := PIW 288
  HI_LIM   := 1.000000e+001
  LO_LIM   := 0.000000e+000
  BIPOLAR  := FALSE      // unipolar 0..10 V → 0..27648
  RET_VAL  := MW 200
  OUT      := MD 104

// SFB41 "CONT_C" PID controller
//   CYCLE must equal OB35 period and be >= AI cycle time
CALL  SFB 41, DB 30
  SP_INT   := MD 100         // setpoint in bar
  PV_IN    := MD 104         // scaled PV from FC105
  MAN      := 0.0
  MAN_ON   := FALSE
  CYCLE    := T#160MS        // OB35 = 160 ms (matches 1KF02 50 Hz, 8 ch)
  SP_HLM   := 1.000000e+001
  SP_LLM   := 0.000000e+000
  PV_HLM   := 1.000000e+001
  PV_LLM   := 0.000000e+000
  DEADB_W  := 0.0
  GAIN     := 2.5
  TI       := T#2S
  TD       := T#100MS
  LMN_HLM  := 1.000000e+002
  LMN_LLM  := 0.000000e+000
  PV_FAC   := 1.0
  PV_OFF   := 0.0
  LMN_FAC  := 1.0
  LMN_OFF  := 0.0
  I_ITL    := 0.0
  I_ITL_ON := FALSE
  LMN      := MD 108
  LMN_PER  := PQW 288
Critical: The CYCLE input of SFB41 must match OB35. If OB35 is 20 ms but the AI is 65 ms, the PID effectively operates at 65 ms. Do not "speed up" CYCLE below the AI cycle — it produces no benefit and may destabilize the loop.

8.2 CYCLE vs AI Conversion: Timing Diagram

The diagram below illustrates the mismatch when OB35 = 20 ms but the AI cycle is 65 ms. Only every fourth OB35 execution sees a fresh PV value; the intervening three cycles operate on the same value.

0 20 40 60 80 100 120 AI update OB35 call ms ● fresh PV ○ stale PV (3 of 4 cycles)

8.3 Discrete-time tuning reminder

When OB35 is changed, the discrete-time PID parameters must be re-tuned. The effective integral and derivative gains scale with the sample time:

K_i(discrete) = K_p · Ts / T_i   and   K_d(discrete) = K_p · T_d / Ts

Halving the OB35 period halves the integral action per second and doubles the derivative action per second. Re-run an open-loop step test after any OB35 change.

9. Faster Alternatives When 65 ms Is Too Slow

Faster analog input options for S7-300 / ET200
Order No. Description Channels Resolution Cycle / channel Notes
6ES7 331-7HF01-0AB0 SM 331 AI 8 x 14 Bit HS 8 14 bit + sign 0.4 ms Direct S7-300 replacement; verify 0–10 V range in catalog
6ES7 134-4FB52-0AB0 ET200S AI 2 U HS 2 15 bit + sign 0.1 ms Distributed on PROFIBUS; sub-ms update
6ES7 134-6HD00-0BA1 ET200SP AI 4xU/I 2-wire HS 4 16 bit ≤ 0.5 ms PROFINET; TIA Portal V13+
6ES7 134-6HB00-0DA1 ET200SP AI 2xU/I 2/4-wire HS 2 16 bit ≤ 0.5 ms Successor of 6HD00 series
6ES7 531-7KF00-0AB0 ET200M SM 531 AI 8 x 16 bit 8 16 bit ~1 ms / channel High precision + speed

For a step response requirement below 50 ms in a pressure loop, the ET200SP or 7HF01 is the minimum sensible choice. The 1KF02 is acceptable only for loops with τ > 500 ms.

10. Commissioning and Verification Procedure

  1. Force the AI to a known input (e.g. 5.000 V from a calibrator). Confirm the scaled PV in MD104 reads 5.000 ± 0.005.
  2. Open a STEP 7 watch table on PIW 288, MW 200, MD 104, MD 108. Enable "Trigger on condition" with a periodic trigger every 50 ms.
  3. Record the time between two consecutive PIW 288 changes. This is the AI cycle time.
  4. Apply a step change to the setpoint (MD100) and trace MD104 (PV) and MD108 (LMN). Measure the closed-loop time constant from the trace.
  5. If the closed-loop τ is more than 3× the AI cycle time, the AI is the bottleneck. Switch to 7HF01 or ET200SP HS.
  6. Verify CYCLE = OB35 period in the SFB41 instance DB.
  7. Disable derivative action (TD = T#0MS) initially; tune GAIN and TI first, then add TD if needed.
  8. Add a software low-pass filter (FC106 moving average, length 4–8 samples) when noise is visible in the PV trace.
  9. Enable process value monitoring in HW Config (wire break, overflow) to surface wiring faults during commissioning.
  10. Capture a final S7 trace with timestamps and save it as the "golden record" for the loop's performance.

11. Troubleshooting Matrix

Symptom → likely cause → corrective action
Symptom Likely cause Corrective action
Oscillation at high frequency (~ 0.5 Hz) AI cycle too slow for loop; aliasing of noise Reduce AI cycle (7HF01) or add software low-pass filter; reduce GAIN, increase TI
Slow setpoint tracking, no overshoot PID cycle ≫ AI cycle; conservative tuning forced by sampling Match OB35 to AI cycle; switch to 7HF01 for tighter cycle
Steady-state error despite integral action Resolution insufficient at ±10 V range; quantization error Change AI range to 0–10 V; upgrade to 14-bit (7HF01) or 16-bit (7PF01)
Setpoint jumps, then stable — derivative kick Derivative on error instead of on PV; setpoint step saturates D-term Apply setpoint ramp; switch to derivative-on-PV via SFB41 configuration
PV reads -32768 or 32767 Open input or over-range; wire break Check wiring; verify jumper (7HF01); check range setting in HW Config
PV noisy, LMN chatters Insufficient filtering; 50/60 Hz pickup at 400 Hz integration Use 50 Hz integration; add FC106 moving average; check shielding and grounding
Loop works in simulation, unstable on real plant Process faster than expected (hydraulic, not pneumatic) Measure real τ; upgrade AI to 7HF01 or ET200SP HS
OB35 does not fire OB35 not assigned or disabled in CPU properties Open CPU properties → Cyclic Interrupts; assign and enable OB35
SFB41 output is constant CYCLE parameter wrong or MAN_ON stuck Verify CYCLE = OB35 period; reset MAN_ON to FALSE
AI value jumps by 1 LSB frequently Resolution limit at 13-bit, ±10 V range Switch to 0–10 V unipolar range; or upgrade to 7HF01 (14 bit) / 7PF01 (16 bit)

12. Field-Engineering Notes

  • The 65 ms figure is typical for 1KF02 at 50 Hz with 8 channels. Some integrators see 80 ms or 100 ms depending on group configuration. Always measure, do not assume.
  • Do not use the 1KF02 for any closed loop faster than 1 Hz. It is designed for process monitoring, not motion-class control.
  • The 6ES7 331-7HF01-0AB0 supports 0–10 V, but verify the jumper and the catalog entry. The earlier 7HF00-0AB0 may be limited to ±10 V — this is a frequent procurement error.
  • SFB41 CYCLE parameter is not optional. A CYCLE of T#0MS or a value smaller than the AI cycle produces erratic control. Always populate CYCLE explicitly.
  • OB35 default is 100 ms in STEP 7 V5.x. The default works fine with the 1KF02 but is wasteful for the 7HF01. Reduce OB35 to 10 ms or 20 ms when using the 7HF01.
  • The ET200SP high-speed AI (6ES7 134-6HD00-0BA1) needs TIA Portal and a PROFINET head module. It is not configurable from STEP 7 V5.x. Plan the migration if the plant is currently S7-300/400.
  • Watch the common-mode voltage. The 1KF02 and 7HF01 both have limited common-mode rejection between channels. A grounded-junction thermocouple next to a 50 V common-mode signal is a frequent source of cross-talk.
  • Pressure safety: Any tuning change to a pressure loop should be performed with the actuator in a safe state. Hydraulic and high-pressure pneumatic systems can cause severe mechanical damage on uncontrolled overshoot.
  • Use FC106 for moving-average filtering on the scaled PV before it enters SFB41 when the process is noisy. Length 4–8 is a reasonable starting point; longer windows add more phase lag.
  • Document the AI cycle time in the loop drawing. A small block in the P&ID or loop sheet saying "AI cycle = 65 ms, OB35 = 100 ms" prevents the next engineer from re-discovering the bottleneck.

13. Frequently Asked Questions

What is the conversion time of the 6ES7 331-1KF02-0AB0?

The 1KF02 has a configurable integration time of 2.5 / 16.67 / 20 / 100 ms per channel, depending on the interference suppression setting (400 / 60 / 50 / 10 Hz). For all 8 channels scanned cyclically, the total cycle ranges from 20 ms (400 Hz) to 800 ms (10 Hz). The 65 ms observed in the field is consistent with 4 active channels at 60 Hz integration.

Can I keep OB35 at 20 ms if the 1KF02 is 65 ms?

You can call OB35 at 20 ms, but the SFB41 PID will read the same analog value several times before a new conversion is available. The effective sample time of the closed loop becomes 65 ms, not 20 ms. Either set OB35 to match the AI cycle (160 ms at 50 Hz) or replace the 1KF02 with a faster module such as 6ES7 331-7HF01-0AB0.

Is the 6ES7 331-7HF01-0AB0 a direct replacement for the 1KF02?

Functionally, yes — both occupy the same S7-300 slot, both support 0–10 V (for the 7HF01, verify against the Siemens catalog), and both have 8 channels. The 7HF01 provides 14-bit resolution and 0.4 ms per-channel conversion versus 13-bit and 2.5–100 ms for the 1KF02. The hardware jumper for voltage/current must be re-set on the 7HF01.

Does the 7HF00-0AB0 support 0–10 V?

The earlier 7HF00 revision is generally limited to bipolar ±10 V. If you require 0–10 V unipolar and 0.4 ms conversion, use the 7HF01-0AB0 or later. Always check the current Siemens Industry Online Support catalog entry for the specific MLFB before ordering.

What is the fastest Siemens AI for an S7-300 / ET200M pressure loop?

For an S7-300/400 CPU, the 6ES7 331-7HF01-0AB0 (0.4 ms, 14 bit) or 6ES7 331-7PF11-0AB0 (16 bit, configurable) are the typical choices. For higher speed, migrate to an S7-1500 with the ET200SP high-speed AI (6ES7 134-6HD00-0BA1 or 6ES7 134-6HB00-0DA1) at sub-millisecond update, or use a T-CPU with SIMATIC Motion Control.

How do I measure the real cycle time of my SM331?

Force a step change on the AI input with a calibrator. In STEP 7, open a watch table on the PIW of the channel and a free timer (for example MW200 incremented in OB1). The interval between two consecutive PIW changes is the AI cycle. Alternatively, enable the diagnostic interrupt and read the OB40 timestamp on the first update.

Does my SFB41 CYCLE need to match the AI cycle exactly?

CYCLE must match the OB35 call period of the SFB41 instance. The AI cycle sets a hard lower bound — it is the maximum useful PID rate. If CYCLE is set below the AI cycle, the PID will compute against stale data without any performance benefit, and may destabilize the loop by amplifying measurement noise on the same reading.

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